Nandita Vijaykumar

Orcid: 0000-0003-3315-9336

According to our database1, Nandita Vijaykumar authored at least 47 papers between 2015 and 2024.

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Bibliography

2024
DISORF: A Distributed Online NeRF Training and Rendering Framework for Mobile Robots.
CoRR, 2024

ACS: Concurrent Kernel Execution on Irregular, Input-Dependent Computational Graphs.
CoRR, 2024

DISTWAR: Fast Differentiable Rendering on Raster-based Rendering Pipelines.
CoRR, 2024

2023
Ev-Conv: Fast CNN Inference on Event Camera Inputs for High-Speed Robot Perception.
IEEE Robotics Autom. Lett., June, 2023

DaeMon: Architectural Support for Efficient Data Movement in Fully Disaggregated Systems.
Proc. ACM Meas. Anal. Comput. Syst., March, 2023

ALP: Alleviating CPU-Memory Data Movement Overheads in Memory-Centric Systems.
IEEE Trans. Emerg. Top. Comput., 2023

EvConv: Fast CNN Inference on Event Camera Inputs For High-Speed Robot Perception.
CoRR, 2023

Architectural Support for Efficient Data Movement in Disaggregated Systems.
CoRR, 2023

DaeMon: Architectural Support for Efficient Data Movement in Disaggregated Systems.
CoRR, 2023

Architectural Support for Efficient Data Movement in Fully Disaggregated Systems.
Proceedings of the Abstract Proceedings of the 2023 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2023

Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings.
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

ENVIDR: Implicit Differentiable Renderer with Neural Environment Lighting.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

2022
MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations.
ACM Trans. Archit. Code Optim., 2022

Utopia: Efficient Address Translation using Hybrid Virtual-to-Physical Address Mapping.
CoRR, 2022

RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory.
CoRR, 2022

SPIDR: SDF-based Neural Point Fields for Illumination and Deformation.
CoRR, 2022

GenStore: A High-Performance and Energy-Efficient In-Storage Computing System for Genome Sequence Analysis.
CoRR, 2022

GenStore: In-Storage Filtering of Genomic Data for High-Performance and Energy-Efficient Genome Analysis.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

CoordX: Accelerating Implicit Neural Representation with a Split MLP Architecture.
Proceedings of the Tenth International Conference on Learning Representations, 2022

GenStore: a high-performance in-storage processing system for genome sequence analysis.
Proceedings of the ASPLOS '22: 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Lausanne, Switzerland, 28 February 2022, 2022

GPUPool: A Holistic Approach to Fine-Grained GPU Sharing in the Cloud.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

VoxelCache: Accelerating Online Mapping in Robotics and 3D Reconstruction Tasks.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021
DAMOV: A New Methodology and Benchmark Suite for Evaluating Data Movement Bottlenecks.
IEEE Access, 2021

QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

SynCron: Efficient Synchronization Support for Near-Data-Processing Architectures.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
Rethinking Divide and Conquer - Towards Holistic Interfaces of the Computing Stack.
IEEE Internet Comput., 2020

Echo: Compiler-based GPU Memory Footprint Reduction for LSTM RNN Training.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

SysScale: Exploiting Multi-domain Dynamic Voltage and Frequency Scaling for Energy Efficient Mobile Processors.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019
Enhancing Programmability, Portability, and Performance with Rich Cross-Layer Abstractions.
CoRR, 2019

SMASH: Co-designing Software Compression and Hardware-Accelerated Indexing for Efficient Sparse Matrix Operations.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

CROW: a low-cost substrate for improving DRAM performance, energy efficiency, and reliability.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

2018
EcoRNN: Fused LSTM RNN Implementation with Data Layout Optimization.
CoRR, 2018

Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency.
CoRR, 2018

SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure.
CoRR, 2018

Decoupling GPU Programming Models from Resource Management for Enhanced Programming Ease, Portability, and Performance.
CoRR, 2018

Zorua: Enhancing Programming Ease, Portability, and Performance in GPUs by Decoupling Programming Models from Resource Management.
CoRR, 2018

A Case for Richer Cross-Layer Abstractions: Bridging the Semantic Gap with Expressive Memory.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

The Locality Descriptor: A Holistic Cross-Layer Abstraction to Express Data Locality In GPUs.
Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

2017
Gaia: Geo-Distributed Machine Learning Approaching LAN Speeds.
Proceedings of the 14th USENIX Symposium on Networked Systems Design and Implementation, 2017

SoftMC: A Flexible and Practical Open-Source Infrastructure for Enabling Experimental DRAM Studies.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016
A Framework for Accelerating Bottlenecks in GPU Execution with Assist Warps.
CoRR, 2016

Zorua: A holistic approach to resource virtualization in GPUs.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

Accelerating pointer chasing in 3D-stacked memory: Challenges, mechanisms, evaluation.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

A case for toggle-aware compression for GPU systems.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

ChargeCache: Reducing DRAM latency by exploiting row access locality.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015
A case for core-assisted bottleneck acceleration in GPUs: enabling flexible data compression with assist warps.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015


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