Mahesh Ketkar

According to our database1, Mahesh Ketkar authored at least 18 papers between 2000 and 2023.

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Bibliography

2023
Machine Learning for Microprocessor Performance Bug Localization.
CoRR, 2023

MQL: ML-Assisted Queuing Latency Analysis for Data Center Networks.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2023

Ditto: End-to-End Application Cloning for Networked Cloud Services.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
Mining Patterns From Concurrent Execution Traces.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

End-to-End Application Cloning for Distributed Cloud Microservices with Ditto.
CoRR, 2022

2021
Model Synthesis for Communication Traces of System-on-Chip Designs.
CoRR, 2021

A Comparative Study of Specification Mining Methods for SoC Communication Traces.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

Mining Message Flows from System-on-Chip Execution Traces.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

Model Synthesis for Communication Traces of System Designs.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Automatic Microprocessor Performance Bug Detection.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
Mining Message Flows using Recurrent Neural Networks for System-on-Chip Designs.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

2019
PerfProbe: a systematic, cross-layer performance diagnosis framework for mobile platforms.
Proceedings of the 6th International Conference on Mobile Software Engineering and Systems, 2019

2009
Gate Sizing for Cell-Library-Based Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

A microarchitecture-based framework for pre- and post-silicon power delivery analysis.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

2007
Comparative Analysis of Conventional and Statistical Design Techniques.
Proceedings of the 44th Design Automation Conference, 2007

2002
Standby power optimization via transistor sizing and dual threshold voltage assignment.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2000
A new class of convex functions for delay modeling and itsapplication to the transistor sizing problem [CMOS gates].
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Convex delay models for transistor sizing.
Proceedings of the 37th Conference on Design Automation, 2000


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