Michel J. Declercq

According to our database1, Michel J. Declercq authored at least 20 papers between 1991 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2000, "For contributions to innovate design of mixed signal integrated circuits.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2011
A 0.24-nJ/bit Super-Regenerative Pulsed UWB Receiver in 0.18- μ m CMOS.
IEEE J. Solid State Circuits, 2011

2010
Wireless Voltage Regulation for Passive Transponders Using an IF to Communicate.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009
Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008
Compact Modeling of Suspended Gate FET.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

A 7.5mA 500 MHz UWB receiver based on super-regenerative principle.
Proceedings of the ESSCIRC 2008, 2008

2007
A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

2005
A model for μ-power rectifier analysis and design.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005

2004
Modeling techniques and verification methodologies for substrate coupling effects in mixed-signal system-on-chip designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

2003
Frequency-interleaving technique for high-speed A/D conversion.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Modeling and Design of a Low-Voltage SOI Suspended-Gate MOSFET (SG-MOSFET) with a Metal-over-Gate Architecture.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

A SET quantizer circuit aiming at digital communication system.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Analysis and optimization of substrate noise coupling in single-chip RF transceiver design.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

HSpeedEx: a high-speed extractor for substrate noise analysis in complex mixed signal SOC.
Proceedings of the 39th Design Automation Conference, 2002

Few electron devices: towards hybrid CMOS-SET integrated circuits.
Proceedings of the 39th Design Automation Conference, 2002

1999
A 640 mW high accuracy 8-bit 1 GHz flash ADC encoder.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Performance/power tradeoffs in high-speed GaAs ADCs.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1997
EUROPRACTICE and FUSE: the European Commission programmes for supporting education and technology transfer in microelectronics.
Proceedings of the 1997 IEEE International Conference on Microelectronic Systems Education, 1997

1992
A prototype tool for the design-oriented symbolic analysis of analogue circuits.
Int. J. Circuit Theory Appl., 1992

A fast, single-layer, area router for semi-custom analogue circuits.
Int. J. Circuit Theory Appl., 1992

1991
An integrated layout system for sea-of-gates module generation.
Proceedings of the conference on European design automation, 1991


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