Josep Balasch

Orcid: 0000-0002-6066-8710

According to our database1, Josep Balasch authored at least 33 papers between 2010 and 2023.

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Bibliography

2023
Low-Cost First-Order Secure Boolean Masking in Glitchy Hardware.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Efficient Software Masking of AES through Instruction Set Extensions.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

On the Unpredictability of SPICE Simulations for Side-Channel Leakage Verification of Masked Cryptographic Circuits.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2021
A Side-Channel-Resistant Implementation of SABER.
ACM J. Emerg. Technol. Comput. Syst., 2021

2020
Side-channel countermeasures utilizing dynamic logic reconfiguration: Protecting AES/Rijndael and Serpent encryption in hardware.
Microprocess. Microsystems, 2020

Towards efficient and automated side-channel evaluations at design time.
J. Cryptogr. Eng., 2020

Sweeping for Leakage in Masked Circuit Layouts.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Design Considerations for EM Pulse Fault Injection.
Proceedings of the Smart Card Research and Advanced Applications, 2019

2018
Private Mobile Pay-TV From Priced Oblivious Transfer.
IEEE Trans. Inf. Forensics Secur., 2018

The Impact of Pulsed Electromagnetic Fault Injection on True Random Number Generators.
Proceedings of the 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2018

Teaching HW/SW codesign with a Zynq ARM/FPGA SoC.
Proceedings of the 12th European Workshop on Microelectronics Education, 2018

Design and testing methodologies for true random number generators towards industry certification.
Proceedings of the 23rd IEEE European Test Symposium, 2018

An In-Depth and Black-Box Characterization of the Effects of Laser Pulses on ATmega328P.
Proceedings of the Smart Card Research and Advanced Applications, 2018

2017
Consolidating Inner Product Masking.
IACR Cryptol. ePrint Arch., 2017

2016
Dude, is my code constant time?
IACR Cryptol. ePrint Arch., 2016

Exploring active manipulation attacks on the TERO random number generator.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Design and Implementation of a Waveform-Matching Based Triggering System.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2016

Single-Trace Side-Channel Attacks on Scalar Multiplications with Precomputations.
Proceedings of the Smart Card Research and Advanced Applications, 2016

2015
Anonymous Split E-Cash - Toward Mobile Anonymous Payments.
ACM Trans. Embed. Comput. Syst., 2015

DPA, Bitslicing and Masking at 1 GHz.
IACR Cryptol. ePrint Arch., 2015

Inner Product Masking Revisited.
IACR Cryptol. ePrint Arch., 2015

24.1 Circuit challenges from cryptography.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
On the Cost of Lazy Engineering for Masked Software Implementations.
IACR Cryptol. ePrint Arch., 2014

2013
Teaching HW/SW Co-Design With a Public Key Cryptography Application.
IEEE Trans. Educ., 2013

2012
Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices.
IACR Cryptol. ePrint Arch., 2012

Gone in 360 Seconds: Hijacking with Hitag2.
Proceedings of the 21th USENIX Security Symposium, Bellevue, WA, USA, August 8-10, 2012, 2012

Power Analysis of Atmel CryptoMemory - Recovering Keys from Secure EEPROMs.
Proceedings of the Topics in Cryptology - CT-RSA 2012 - The Cryptographers' Track at the RSA Conference 2012, San Francisco, CA, USA, February 27, 2012

Theory and Practice of a Leakage Resilient Masking Scheme.
Proceedings of the Advances in Cryptology - ASIACRYPT 2012, 2012

2011
A Privacy-Preserving Buyer-Seller Watermarking Protocol Based on Priced Oblivious Transfer.
IEEE Trans. Inf. Forensics Secur., 2011

PriPAYD: Privacy-Friendly Pay-As-You-Drive Insurance.
IEEE Trans. Dependable Secur. Comput., 2011

An In-depth and Black-box Characterization of the Effects of Clock Glitches on 8-bit MCUs.
Proceedings of the 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2011

2010
PrETP: Privacy-Preserving Electronic Toll Pricing.
Proceedings of the 19th USENIX Security Symposium, 2010

An embedded platform for privacy-friendly road charging applications.
Proceedings of the Design, Automation and Test in Europe, 2010


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