Milad Hashemi

According to our database1, Milad Hashemi authored at least 23 papers between 2012 and 2023.

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Bibliography

2023
Towards Better Out-of-Distribution Generalization of Neural Algorithmic Reasoning Tasks.
Trans. Mach. Learn. Res., 2023

Learning Performance-Improving Code Edits.
CoRR, 2023

CUF: Continuous Upsampling Filters.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2023

2022
Learning to Improve Code Efficiency.
CoRR, 2022

Data-Driven Offline Optimization for Architecting Hardware Accelerators.
Proceedings of the Tenth International Conference on Learning Representations, 2022

Two Sides of the Same Coin: Heterophily and Oversmoothing in Graph Convolutional Neural Networks.
Proceedings of the IEEE International Conference on Data Mining, 2022

2021
Analyzing a Caching Model.
CoRR, 2021

Apollo: Transferable Architecture Exploration.
CoRR, 2021

Oops I Took A Gradient: Scalable Sampling for Discrete Distributions.
Proceedings of the 38th International Conference on Machine Learning, 2021

No MCMC for me: Amortized sampling for fast and stable training of energy-based models.
Proceedings of the 9th International Conference on Learning Representations, 2021

A hierarchical neural model of data prefetching.
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2020
Machine Learning for Systems.
IEEE Micro, 2020

Learned Hardware/Software Co-Design of Neural Accelerators.
CoRR, 2020

Neural Execution Engines: Learning to Execute Subroutines.
Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020

An Imitation Learning Approach for Cache Replacement.
Proceedings of the 37th International Conference on Machine Learning, 2020

Learning Execution through Neural Code fusion.
Proceedings of the 8th International Conference on Learning Representations, 2020

2018
Learning Memory Access Patterns.
Proceedings of the 35th International Conference on Machine Learning, 2018

2016
On-Chip Mechanisms to Reduce Effective Memory Access Latency.
CoRR, 2016

Efficient Execution of Bursty Applications.
IEEE Comput. Archit. Lett., 2016

Continuous runahead: Transparent hardware acceleration for memory intensive workloads.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Accelerating Dependent Cache Misses with an Enhanced Memory Controller.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

2015
Filtered runahead execution with a runahead buffer.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

2012
MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLP.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012


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