Patrick Scheer

According to our database, Patrick Scheer authored at least 10 papers between 2008 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Corrections to "Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge".

Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragán, Philippe Cathelin, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel

IEEE Access, 2023

Design-oriented model for short-channel MOS transistors based on inversion charge.

Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragán, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel

Proceedings of the 14th IEEE Latin America Symposium on Circuits and System, 2023

Resistive Feedback LNA design using a 7-parameter design-oriented model for advanced technologies.

Mohamed Khalil Bouchoucha, Dayana A. Pino-Monroy, Patrick Scheer, Philippe Cathelin, Jean-Michel Fournier, Manuel J. Barragán, Andreia Cathelin, Sylvain Bourdel

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

40-nm RFSOI technology exhibiting 90fs RON × COFF and fT/fMAX of 250 GHz/350 GHz targeting sub-6 GHz and mmW 5G applications.

S. Crémer, N. Pelloux, F. Gianesello, Y. Mourier, G. Haury, Tulio Chaves de Albuquerque, Frederic Monsieur, H. Audouin, C. A. Legrand, C. Diouf, J. Azevedo Goncalves, C. Belem Goncalves, C. Durand, N. Vulliet, L. Berthier, Emeline Souchier, P. Garcia, S. Jan, M. Hello, M. L. Rellier, Patrick Scheer, B. Duriez, Xavier Garros, T. Bordignon, F. Paillardet, Pascal Chevalier

Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023

2022

Design-Oriented All-Regime All-Region 7-Parameter Short-Channel MOSFET Model Based on Inversion Charge.

Dayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragán, Philippe Cathelin, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel

IEEE Access, 2022

2018

Analysis of Gate Current Wafer Level Variability in Advanced FD-SOI MOSFETs.

Krishna Pradeep, Theano A. Karatsori, Thierry Poiroux, Andre Juge, Patrick Scheer, Gilles Gouget, Emmanuel Josse, Gérard Ghibaudo

Proceedings of the 48th European Solid-State Device Research Conference, 2018

2016

Analog and RF modeling of FDSOI UTBB MOSFET using Leti-UTSOI model.

Salim El Ghouli, Patrick Scheer, Michel Minondo, Andre Juge, Thierry Poiroux, Jean-Michel Sallese, Christophe Lallement

Proceedings of the 2016 MIXDES, 2016

2012

Reliability Characterization and Modeling Solution to Predict Aging of 40-nm MOSFET DC and RF Performances Induced by RF Stresses.

Laurent Negre, David Roy, Florian Cacho, Patrick Scheer, Sebastien Jan, Samuel Boret, Daniel Gloria, Gérard Ghibaudo

IEEE J. Solid State Circuits, 2012

4-Port isolated MOS modeling and extraction for mmW applications.

Benjamin Dormieu, Patrick Scheer, Clement Charbuillet, Sebastien Jan, François Danneville

Proceedings of the 38th European Solid-State Circuit conference, 2012

2008

CARbridge, Reduction of System Complexity by Standardisation of the System-Basis-Chips for Automotive Applications.

Patrick Scheer, Ernst Schmidt, Stefan Burges

Proceedings of the Design, Automation and Test in Europe, 2008