Florian Kriebel
According to our database1,
Florian Kriebel
authored at least 32 papers
between 2011 and 2023.
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Bibliography
2023
SHIELD: An Adaptive and Lightweight Defense against the Remote Power Side-Channel Attacks on Multi-tenant FPGAs.
CoRR, 2023
2019
Architectural-Space Exploration of Heterogeneous Reliability and Checkpointing Modes for Out-of-Order Superscalar Processors.
IEEE Access, 2019
Studying Aging and Soft Error Mitigation Jointly under Constrained Scenarios in Multi-Cores.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
2018
Heterogeneous Reliability Modes with Efficient State Compression for Out-of-Order Superscalar Processors.
CoRR, 2018
Robustness for Smart Cyber Physical Systems and Internet-of-Things: From Adaptive Robustness Methods to Reliability and Security for Machine Learning.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding.
IEEE Trans. Computers, 2017
2016
ACM Trans. Embed. Comput. Syst., 2016
IEEE Trans. Computers, 2016
Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity.
IEEE Trans. Computers, 2016
IEEE Des. Test, 2016
Cross-Layer Reliability Modeling and Optimization: Compiler and Run-Time System Interactions.
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
ageOpt-RMT: compiler-driven variation-aware aging optimization for redundant multithreading.
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
DRVS: Power-efficient reliability management through Dynamic Redundancy and Voltage Scaling under variations.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
ACSEM: accuracy-configurable fast soft error masking analysis in combinatorial circuits.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
dsReliM: Power-constrained reliability management in Dark-Silicon many-core chips under process variations.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
R<sup>2</sup>Cache: Reliability-aware reconfigurable last-level cache architecture for multi-cores.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Compiler-driven dynamic reliability management for on-chip systems under variabilities.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
dTune: Leveraging Reliable Code Generation for Adaptive Dependability Tuning under Process Variation and Aging-Induced Effects.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
ASER: Adaptive Soft Error Resilience for Reliability-Heterogeneous Processors in the Dark Silicon Era.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2013
Reliable code generation and execution on unreliable hardware under joint functional and timing reliability considerations.
Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013
Leveraging variable function resilience for selective software reliability on unreliable hardware.
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Power-efficient error-resiliency for H.264/AVC Context-Adaptive Variable Length Coding.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Revc: Computationally Reliable Video Coding on unreliable hardware platforms: A case study on error-tolerant H.264/AVC CAVLC entropy coding.
Proceedings of the 18th IEEE International Conference on Image Processing, 2011
Reliable software for unreliable hardware: embedded code generation aiming at reliability.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011