Qianying Tang

Orcid: 0000-0003-4138-2087

According to our database1, Qianying Tang authored at least 14 papers between 2004 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2018
A 65-nm 10-Gb/s 10-mm On-Chip Serial Link Featuring a Digital-Intensive Time-Based Decision Feedback Equalizer.
IEEE J. Solid State Circuits, 2018

A Physical Unclonable Function based on Capacitor Mismatch in a Charge-Redistribution SAR-ADC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A 2.1 pJ/bit, 8 Gb/s Ultra-Low Power In-Package Serial Link Featuring a Time-based Front-end and a Digital Equalizer.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017
Characterizing the Impact of RTN on Logic and SRAM Operation Using a Dual Ring Oscillator Array Circuit.
IEEE J. Solid State Circuits, 2017

A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

A DRAM based physical unclonable function capable of generating >10<sup>32</sup> Challenge Response Pairs per 1Kbit array for secure chip authentication.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
Beat Frequency Detector-Based High-Speed True Random Number Generators: Statistical Modeling and Analysis.
ACM J. Emerg. Technol. Comput. Syst., 2016

2015
The Dependence of BTI and HCI-Induced Frequency Degradation on Interconnect Length and Its Circuit Level Implications.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2014
Silicon Odometers: Compact In Situ Aging Sensors for Robust System Design.
IEEE Micro, 2014

True Random Number Generator circuits based on single- and multi-phase beat frequency detection.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2005
Calligrapher: a new layout-migration engine for hard intellectual property libraries.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Two-Dimensional Layout Migration by Soft Constraint Satisfaction.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

2004
A robot path planning approach based on generalized semi-infinite optimization.
Proceedings of the 2004 IEEE Conference on Robotics, Automation and Mechatronics, 2004

An Efficient Method to Estimate Labelled Sample Size for Transductive LDA(QDA/MDA) Based on Bayes Risk.
Proceedings of the Machine Learning: ECML 2004, 2004


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