Richard E. Serton

According to our database, Richard E. Serton authored at least 3 papers between 2011 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability.

David Wolpert, Gerry Strevig, Christopher J. Berry, Leon J. Sigal, Bill Huott, Mark Cichanowski, Matthias Pflanz, Tobias Werner, Philipp Salz, Nick Jinq, Michael Romain, Iris Leefken, Richard E. Serton, Rajesh Veerabhadraiah, Dureseti Chidambarrao, Robert Arelt, Matt Angyal, Ben Trombley, Arvind Haran, Stefan Hougardy, Ben Klotz, Rahul M. Rao

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2018

IBM z14: Enabling physical design in 14-nm technology for high-performance, high-reliability microprocessors.

David Wolpert, Erwin Behnen, Leon J. Sigal, Yuen H. Chan, Gustavo Enrique Téllez, Douglas Bradley, Richard E. Serton, Rajesh Veerabhadraiah, William Ansley, Andrew Bianchi, Nagu Dhanwada, Sungjae Lee, Michael Scheuermann, Glen A. Wiedemeier, John Davis, Tobias Werner, Laura Darden, Keith G. Barkley, Michael Gray, Matthew Guzowski, Mitch DeHond, Timothy Schell, Stelios Tsapepas, Di Phan, Kriti Acharya, Jeffrey A. Zitz, Hunter F. Shi, Christopher J. Berry, James D. Warnock, Michael H. Wood, Robert M. Averill III

IBM J. Res. Dev., 2018

2011

Dynamic hit logic with embedded 8Kb SRAM in 45nm SOI for the zEnterprise™ processor.

Antonio Pelella, Yuen H. Chan, Bargav Balakrishnan, Pradip Patel, Daniel Rodko, Richard E. Serton

Proceedings of the IEEE International Solid-State Circuits Conference, 2011