James D. Warnock

According to our database1, James D. Warnock authored at least 33 papers between 1995 and 2018.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 2012, "For contributions to circuit design of high-performance microprocessors".

Timeline

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Links

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Bibliography

2018
IBM z14: Enabling physical design in 14-nm technology for high-performance, high-reliability microprocessors.
IBM J. Res. Dev., 2018

IBM z14 design methodology enhancements in the 14-nm technology node.
IBM J. Res. Dev., 2018

Impact of Device Aging on Early Mode Failures in Pulsed Latches.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018


2016
Design-synthesis co-optimisation using skewed and tapered gates.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking.
IEEE J. Solid State Circuits, 2015

IBM POWER8 circuit design and energy optimization.
IBM J. Res. Dev., 2015

IBM z13 circuit design and methodology.
IBM J. Res. Dev., 2015


A case study of electromigration reliability: From design point to system operations.
Proceedings of the IEEE International Reliability Physics Symposium, 2015

2014
Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module.
IEEE J. Solid State Circuits, 2014

2013

Circuit and PD challenges at the 14nm technology node.
Proceedings of the International Symposium on Physical Design, 2013

2012
Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise System.
IEEE J. Solid State Circuits, 2012

2011
The zEnterprise 196 System and Microprocessor.
IEEE Micro, 2011

POWER7™, a Highly Parallel, Scalable Multi-Core High End Server Processor.
IEEE J. Solid State Circuits, 2011


Circuit design challenges at the 14nm technology node.
Proceedings of the 48th Design Automation Conference, 2011

Design, CAD and technology challenges for future processors: 3D perspectives.
Proceedings of the 48th Design Automation Conference, 2011

2010
POWER7<sup>TM</sup> local clocking and clocked storage elements.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
An elegant hardware-corroborated statistical repair and test methodology for conquering aging effects.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

2007
Introduction to the Special Issue on the 2006 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2007

Cell Broadband Engine processor: Design and implementation.
IBM J. Res. Dev., 2007

2006
Circuit Design Techniques for a First-Generation Cell Broadband Engine Processor.
IEEE J. Solid State Circuits, 2006

Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor.
IEEE J. Solid State Circuits, 2006

Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Cell Processor Low-Power Design Methodology.
IEEE Micro, 2005

The design methodology and implementation of a first-generation CELL processor: a multi-core SoC.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2002
The circuit and physical design of the POWER4 microprocessor.
IBM J. Res. Dev., 2002

1997
A 4.1-ns compact 54×54-b multiplier utilizing sign-select Booth encoders.
IEEE J. Solid State Circuits, 1997

Circuit design techniques for the high-performance CMOS IBM S/390 Parallel Enterprise Server G4 microprocessor.
IBM J. Res. Dev., 1997

High-Performance CMOS Circuit Techniques for the G-4 S/390 Microprocessor.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1995
CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applications.
IBM J. Res. Dev., 1995


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