Mark Cichanowski

According to our database1, Mark Cichanowski authored at least 9 papers between 2015 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
IBM Telum II Microprocessor: 5.5 GHz With On-Die AI and Data Processing, and Design-Technology Co-Optimizations for Power, Area, and Reliability.
IEEE J. Solid State Circuits, January, 2026

2025
2.2 IBM Telum II: Next Generation 5.5GHz Microprocessor with On-Die Data Processing Unit and Improved AI Accelerator.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025

37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2022

2021
Cores, Cache, Content, and Characterization: IBM's Second Generation 14-nm Product, z15.
IEEE J. Solid State Circuits, 2021

2020
IBM z15: Physical design improvements to significantly increase content in the same technology.
IBM J. Res. Dev., 2020


2018

2015


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