Antonio Pelella

According to our database, Antonio Pelella authored at least 6 papers between 1993 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise System.

James D. Warnock, Yiu-Hing Chan, Sean M. Carey, Huajun Wen, Patrick J. Meaney, Guenter Gerwig, Howard H. Smith, Yuen H. Chan, John Davis, Paul Bunce, Antonio Pelella, Daniel Rodko, Pradip Patel, Thomas Strach, Doug Malone, Frank Malgioglio, José Neves, David L. Rude, William V. Huott

IEEE J. Solid State Circuits, 2012

2011

Dynamic hit logic with embedded 8Kb SRAM in 45nm SOI for the zEnterprise™ processor.

Antonio Pelella, Yuen H. Chan, Bargav Balakrishnan, Pradip Patel, Daniel Rodko, Richard E. Serton

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2006

A 5.6GHz 64kB Dual-Read Data Cache for the POWER6TM Processor.

John Davis, Don Plass, Paul Bunce, Yuen H. Chan, Antonio Pelella, Rajiv V. Joshi, A. Chen, William V. Huott, Thomas J. Knips, Pradip Patel, K. Lo, Eric Fluhr

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005

A 8Kb domino read SRAM with hit logic and parity checker.

Antonio Pelella, Arthur Tuminaro, Ryan T. Freese, Yuen H. Chan

Proceedings of the 31st European Solid-State Circuits Conference, 2005

1999

The attack of the "Holey Shmoos": a case study of advanced DFD and picosecond imaging circuit analysis (PICA).

William V. Huott, Moyra K. McManus, Daniel R. Knebel, Steve Steen, Dennis Manzer, Pia N. Sanda, Steve Wilson, Yuen H. Chan, Antonio Pelella, Stanislav Polonsky

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1993

Design SRAMs for burn-in.

William R. Reohr, Yuen H. Chan, Donald W. Plass, Antonio Pelella, Philip T. Wu

Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993