Michael Romain

According to our database, Michael Romain authored at least 7 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Dynamic Guardband Features of the IBM z17 System.

Tobias Webel, Phillip J. Restle, Ramon Bertran, Alper Buyuktosunoglu, Sean M. Carey, Alejandro Cook, Karl Anderson, Michael Romain, Thomas Strach, Pradeep Bhadravati Parashurama, Aishwarya Tadkase, Rahman Abber Tahir, Luke Jenkins, Kevin Low, Eberhard Engler

IEEE J. Solid State Circuits, January, 2026

IBM Telum II Microprocessor: 5.5 GHz With On-Die AI and Data Processing, and Design-Technology Co-Optimizations for Power, Area, and Reliability.

Gerald Strevig, David Wolpert, Leon Sigal, Bill Huott, Mark Cichanowski, Noam Jungmann, Michael A. Sperling, Michael J. Becht, Matthias Pflanz, Daniel Kiss, Simon Büchsenstein, Tobias Werner, Philipp Salz, Michael Romain, Richard E. Serton, Nick Jing, Rajesh Veerabhadraiah, Dureseti Chidambarrao, Robert Arelt, Matt Angyal, Ben Trombley, Arvind Haran, Rahul M. Rao, Christopher J. Berry, Amanda Venton, Elazar Kachir, Andreas Arp

IEEE J. Solid State Circuits, January, 2026

2025

8.1 Dynamic Guard-Band Features of the IBM zNext System.

Tobias Webel, Phillip J. Restle, Ramon Bertran, Alper Buyuktosunoglu, Sean M. Carey, Alejandro Cook, Karl Anderson, Michael Romain, Thomas Strach, Pradeep Bhadravati Parashurama, Aishwarya Tadkase, Rahman Abber Tahir, Luke Jenkins, Kevin Low, Eberhard Engler

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2.2 IBM Telum II: Next Generation 5.5GHz Microprocessor with On-Die Data Processing Unit and Improved AI Accelerator.

Gerald Strevig, Christopher J. Berry, Rahul M. Rao, Noam Jungmann, Michael A. Sperling, Michael J. Becht, Eduard Herkel, Matthias Pflanz, Patrick J. Meaney, Michael Romain, Mark Cichanowski, Amanda Venton, David Wolpert, Elazar Kachir, Luke Hopkins, Tim E. Bubb, Andreas Arp, Daniel Kiss, Simon Büchsenstein, Michael H. Wood, Michael Spear, Robert J. Sonnelitter, Rajiv Joshi

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability.

David Wolpert, Gerry Strevig, Christopher J. Berry, Leon J. Sigal, Bill Huott, Mark Cichanowski, Matthias Pflanz, Tobias Werner, Philipp Salz, Nick Jinq, Michael Romain, Iris Leefken, Richard E. Serton, Rajesh Veerabhadraiah, Dureseti Chidambarrao, Robert Arelt, Matt Angyal, Ben Trombley, Arvind Haran, Stefan Hougardy, Ben Klotz, Rahul M. Rao

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2022

IBM Telum: a 16-Core 5+ GHz DCM.

Ofer Geva, Christopher J. Berry, Robert J. Sonnelitter, David Wolpert, Adam Collura, Thomas Strach, Di Phan, Cédric Lichtenau, Alper Buyuktosunoglu, Hubert Harrer, Jeffrey A. Zitz, Chad Marquart, Douglas Malone, Tobias Webel, Adam Jatkowski, John Isakson, Dina Hamid, Mark Cichanowski, Michael Romain, Faisal Hasan, Kevin Williams, Jesse Surprise, Chris Cavitt, Mark Cohen

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021

Cores, Cache, Content, and Characterization: IBM's Second Generation 14-nm Product, z15.

David Wolpert, Christopher J. Berry, Brian Bell, Adam Jatkowski, Jesse Surprise, John Isakson, Ofer Geva, Brian Deskin, Mark Cichanowski, Dina Hamid, Chris Cavitt, Gregory Fredeman, Dinesh Kannambadi, Anthony Saporito, Ashutosh Mishra, Alper Buyuktosunoglu, Tobias Webel, Preetham Lobo, Ramon Bertran, Pradeep Bhadravati Parashurama, Dureseti Chidambarrao, Brandon Bruen, Alan P. Wagstaff, Eric Lukes, Sean M. Carey, Hunter F. Shi, Michael Romain, Paul Logsdon, Ishita Agarwal

IEEE J. Solid State Circuits, 2021