Arvind Haran

Orcid: 0009-0002-3493-6918

According to our database1, Arvind Haran authored at least 8 papers between 2013 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
IBM Telum II Microprocessor: 5.5 GHz With On-Die AI and Data Processing, and Design-Technology Co-Optimizations for Power, Area, and Reliability.
IEEE J. Solid State Circuits, January, 2026

2025
37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2024
Chain-of-Descriptions: Improving Code LLMs for VHDL Code Generation and Summarization.
Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024

2023
Characterization and Exploration of Latch Checkers for Efficient RAS Protection.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

2019
Rewriting toward trace coverage analysis of symmetric systems.
Innov. Syst. Softw. Eng., 2019

2018
An Efficient Rewriting Framework for Trace Coverage of Symmetric Systems.
Proceedings of the NASA Formal Methods - 10th International Symposium, 2018

2015
SMACK+Corral: A Modular Verifier - (Competition Contribution).
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2015

2013
Towards Formal Approaches to System Resilience.
Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013


  Loading...