Rizwan A. Ashraf

Orcid: 0000-0003-4477-0042

According to our database1, Rizwan A. Ashraf authored at least 29 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Automatic Code Generation for High-Performance Graph Algorithms.
Proceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques, 2023

2022
Exploring the Use of Novel Spatial Accelerators in Scientific Applications.
Proceedings of the ICPE '22: ACM/SPEC International Conference on Performance Engineering, Bejing, China, April 9, 2022

ReACT: Redundancy-Aware Code Generation for Tensor Expressions.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

Towards Supporting Semiring in MLIR-Based COMET Compiler.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2020
GPU lifetimes on titan supercomputer: survival analysis and reliability.
Proceedings of the International Conference for High Performance Computing, 2020

2018
Designing and Evaluating Redundancy-Based Soft-Error Masking on a Continuum of Energy versus Robustness.
IEEE Trans. Sustain. Comput., 2018

Survivability Modeling and Resource Planning for Self-Repairing Reconfigurable Device Fabrics.
IEEE Trans. Cybern., 2018

Pattern-based Modeling of Multiresilience Solutions for High-Performance Computing.
Proceedings of the 2018 ACM/SPEC International Conference on Performance Engineering, 2018

Analyzing the Impact of System Reliability Events on Applications in the Titan Supercomputer.
Proceedings of the IEEE/ACM 8th Workshop on Fault Tolerance for HPC at eXtreme Scale, 2018

Shrink or Substitute: Handling Process Failures in HPC Systems Using In-Situ Recovery.
Proceedings of the 26th Euromicro International Conference on Parallel, 2018

Performance Efficient Multiresilience Using Checkpoint Recovery in Iterative Algorithms.
Proceedings of the Euro-Par 2018: Parallel Processing Workshops, 2018

A Big Data Analytics Framework for HPC Log Data: Three Case Studies Using the Titan Supercomputer Log.
Proceedings of the IEEE International Conference on Cluster Computing, 2018

Real-Time Assessment of Supercomputer Status by a Comprehensive Informative Metric through Streaming Processing.
Proceedings of the IEEE International Conference on Big Data (IEEE BigData 2018), 2018

2017
Energy and Delay Tradeoffs of Soft-Error Masking for 16-nm FinFET Logic Paths: Survey and Impact of Process Variation in the Near-Threshold Region.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Contemporary CMOS aging mitigation techniques: Survey, taxonomy, and methods.
Integr., 2017

Exploring the Effect of Compiler Optimizations on the Reliability of HPC Applications.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Towards New Metrics for High-Performance Computing Resilience.
Proceedings of the ACM Workshop on Fault-Tolerance for HPC at Extreme Scale, 2017

2016
Area-energy tradeoffs of logic wear-leveling for BTI-induced aging.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015
Activity-Based Resource Allocation for Motion Estimation Engines.
J. Circuits Syst. Comput., 2015

Power and quality-aware image processing soft-resilience using online multi-objective GAs.
Int. J. Comput. Vis. Robotics, 2015

Understanding the propagation of transient errors in HPC applications.
Proceedings of the International Conference for High Performance Computing, 2015

Reactive rejuvenation of CMOS logic paths using self-activating voltage domains.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Applicability of power-gating strategies for aging mitigation of CMOS logic paths.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Sustainability assurance modeling for SRAM-based FPGA evolutionary self-repair.
Proceedings of the 2014 IEEE International Conference on Evolvable Systems, 2014

2013
Scalable FPGA Refurbishment Using Netlist-Driven Evolutionary Algorithms.
IEEE Trans. Computers, 2013

2012
Designing digital circuits for FPGAs using parallel genetic algorithms (WIP).
Proceedings of the 2012 Spring Simulation Multiconference, 2012

2011
Sustainable Modular Adaptive Redundancy Technique Emphasizing Partial Reconfiguration for Reduced Power Consumption.
Int. J. Reconfigurable Comput., 2011

Design-for-Diversity for Improved Fault-Tolerance of TMR Systems on FPGAs.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

2010
Dynamic Partial Reconfiguration Approach to the Design of Sustainable Edge Detectors.
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2010


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