Navid Khoshavi

Luis Gabriel Jaimes

Proceedings of the ACM SE '22: 2022 ACM Southeast Conference, Virtual Event, April 18, 2022

2021

SLA-Aware Multi-Criteria Data Placement in Cloud Storage Systems.

[BibT_eX]

[DOI]

Arezoo Rahdari

IEEE Access, 2021

Entropy-Based Modeling for Estimating Adversarial Bit-flip Attack Impact on Binarized Neural Network.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Elastic HDFS: interconnected distributed architecture for availability-scalability enhancement of large-scale cloud storages.

[BibT_eX]

[DOI]

J. Supercomput., 2020

Mitigating Process Variability for Non-Volatile Cache Resilience and Yield.

[BibT_eX]

[DOI]

Soheil Salehi

IEEE Trans. Emerg. Top. Comput., 2020

A survey on attack vectors in stack cache memory.

[BibT_eX]

[DOI]

Integr., 2020

MERAM: Non-Volatile Cache Memory Based on Magneto-Electric FETs.

[BibT_eX]

[DOI]

CoRR, 2020

A Survey on Impact of Transient Faults on BNN Inference Accelerators.

[BibT_eX]

[DOI]

Connor Broyles

Yu Bi

CoRR, 2020

Entropy-Based Modeling for Estimating Soft Errors Impact on Binarized Neural Network Inference.

[BibT_eX]

[DOI]

CoRR, 2020

LISA: Language-Independent Method for Aspect-Based Sentiment Analysis.

[BibT_eX]

[DOI]

Mohammadreza Shams

Ahmad Baraani-Dastjerdi

IEEE Access, 2020

Compression or Corruption? A Study on the Effects of Transient Faults on BNN Inference Accelerators.

[BibT_eX]

[DOI]

Connor Broyles

Yu Bi

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

Fiji-FIN: A Fault Injection Framework on Quantized Neural Network Inference Accelerator.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Machine Learning and Applications, 2020

SHIELDeNN: Online Accelerated Framework for Fault-Tolerant Deep Neural Network Architectures.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Self-Organized Sub-bank SHE-MRAM-based LLC: An energy-efficient and variation-immune read and write architecture.

[BibT_eX]

[DOI]

Integr., 2019

2018

Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Optimization.

[BibT_eX]

[DOI]

IEEE Access, 2018

2017

Energy-Aware Adaptive Restore Schemes for MLC STT-RAM Cache.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Contemporary CMOS aging mitigation techniques: Survey, taxonomy, and methods.

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

Integr., 2017

Variation-immune resistive Non-Volatile Memory using self-organized sub-bank circuit designs.

[BibT_eX]

[DOI]

Soheil Salehi

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2016

The Study of Transient Faults Propagation in Multithread Applications.

[BibT_eX]

[DOI]

Armin Samiei

CoRR, 2016

Leveraging the Potential of Control-Flow Error Resilient Techniques in Multithreaded Programs.

[BibT_eX]

[DOI]

CoRR, 2016

Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Enhancement.

[BibT_eX]

[DOI]

CoRR, 2016

Bit-Upset Vulnerability Factor for eDRAM Last Level Cache immunity analysis.

[BibT_eX]

[DOI]

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

AOS: adaptive overwrite scheme for energy-efficient MLC STT-RAM cache.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

Area-energy tradeoffs of logic wear-leveling for BTI-induced aging.

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015

Design and evaluation of an ultra-area-efficient fault-tolerant QCA full adder.

[BibT_eX]

[DOI]

Arman Roohi

Microelectron. J., 2015

Reactive rejuvenation of CMOS logic paths using self-activating voltage domains.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

Applicability of power-gating strategies for aging mitigation of CMOS logic paths.

[BibT_eX]

[DOI]

Rizwan A. Ashraf

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2012

An efficient adaptive software-implemented technique to detect control-flow errors in multi-core architectures.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2012

2011

Control-flow error detection using combining basic and program-level checking in commodity multi-core architectures.

[BibT_eX]

[DOI]

Proceedings of the Industrial Embedded Systems (SIES), 2011

Low-Cost Software-Implemented Error Detection Technique.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Electronic System Design, 2011

Control-flow error recovery using commodity multi-core architecture features.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011

Soft Error Detection Technique in Multi-threaded Architectures Using Control-Flow Monitoring.

[BibT_eX]

[DOI]

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010

Two Efficient Software Techniques to Detect and Correct Control-Flow Errors.

[BibT_eX]

[DOI]