Romain Laffont

According to our database1, Romain Laffont authored at least 12 papers between 2002 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
Effect of AC stress on oxide TDDB and trapped charge in interface states.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

2013
DCG-FGT transistor: Retention study of Floating Gate charge.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Effect of ions presence in the SiOCH inter metal dielectric structure.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
Investigation of the effects of constant voltage stress on thin SiO<sub>2</sub> layers using dynamic measurement protocols.
Microelectron. Reliab., 2012

A new adustable Schmitt Trigger based on Dual Control Gate-Floating Gate Transistor (DCG-FGT).
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

PSP based DCG-FGT transistor Model: Full characterization procedure.
Proceedings of the International Symposium on Communications and Information Technologies, 2012

2011
PSP based DCG-FGT transistor model including characterization procedure.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2010
Leakage paths identification in NVM using biased data retention.
Microelectron. Reliab., 2010

2009
A Modelisation of the temperature dependence of the Fowler-Nordheim current in EEPROM memories.
Microelectron. Reliab., 2009

2007
A new method to quantify retention-failed cells of an EEPROM CAST.
Microelectron. Reliab., 2007

2006
MM11 based flash memory cell model including characterization procedure.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2002
Decreasing EEPROM Programming Bias With Negative Voltage, Reliability Impact.
Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002


  Loading...