Roselyne Chotin-Avot

Haralampos-G. D. Stratigopoulos

Hassan Aboushady

Ozgur Sinanoglu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Novel architectural space exploration environment for multi-FPGA based prototyping systems.

[BibT_eX]

[DOI]

Umer Farooq

Maminionja Ravoson

Microprocess. Microsystems, 2018

2017

AES-GCM and AEGIS: Efficient and High Speed Hardware Implementations.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2017

2016

Inter-FPGA routing environment for performance exploration of multi-FPGA systems.

[BibT_eX]

[DOI]

Umer Farooq

Maminionja Ravoson

Mariem Turki

Proceedings of the 2016 International Symposium on Rapid System Prototyping, 2016

Multiple FPGAs based prototyping and debugging with complete design flow.

[BibT_eX]

[DOI]

Proceedings of the 11th International Design & Test Symposium, 2016

AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs.

[BibT_eX]

[DOI]

Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, 2016

Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration.

[BibT_eX]

[DOI]

Umer Farooq

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2014

Authenticated encryption on FPGAs from the static part to the reconfigurable part.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2014

Low cost solutions for secure remote reconfiguration of FPGAs.

[BibT_eX]

[DOI]

Int. J. Embed. Syst., 2014

Impact of defect tolerance techniques on the criticality of a SRAM-based mesh of cluster FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

A reference-based specification tool for creating reliable library development specifications.

[BibT_eX]

[DOI]

Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Improve defect tolerance in a cluster of a SRAM-based Mesh of Cluster FPGA using hardware redundancy.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Towards high performance GHASH for pipelined AES-GCM using FPGAs (abstract only).

[BibT_eX]

[DOI]

Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm.

[BibT_eX]

[DOI]

Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013

Exploring redundant arithmetics in computer-aided design of arithmetic datapaths.

[BibT_eX]

[DOI]

Sophie Belloeil-Dupuis

Integr., 2013

High speed authenticated encryption for slow changing key applications using reconfigurable devices.

[BibT_eX]

[DOI]

Proceedings of the IFIP Wireless Days, 2013

A formalism of the specifications for library development.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Improved method for parallel AES-GCM cores using FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Lightweight and compact solutions for secure reconfiguration of FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Protecting FPGA bitstreams using authenticated encryption.

[BibT_eX]

[DOI]

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Efficient state-dependent power model for multi-bit flip-flop banks.

[BibT_eX]

[DOI]

Jung Kyu Chae

Severine Bertrand

Pierre-Francois Ollagnon

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Efficient AES-GCM for VPNs using FPGAs.

[BibT_eX]

[DOI]

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A defect-tolerant cluster in a mesh SRAM-based FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

2012

Efficient parallel-pipelined GHASH for message authentication.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

2011

Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools.

[BibT_eX]

[DOI]

Sophie Belloeil-Dupuis

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2008

Arithmetic Data Path Optimization Using Borrow-Save Representation.

[BibT_eX]

[DOI]

Sophie Belloeil

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2006

MP-SoC Architecture for an Obstacle Detection Application in Pre-Crash Situation.

[BibT_eX]

Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

2004

Hardware Implementation of Discrete Stochastic Arithmetic.

[BibT_eX]

[DOI]

Roselyne Avot-Chotin

Numer. Algorithms, 2004

2003

Architectures matérielles pour l'arithmétique stochastique discrète. (Hardware architecture for discrete stochastic arithmetic).

[BibT_eX]

[DOI]