David Cassan

According to our database, David Cassan authored at least 8 papers between 2002 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

A 112-Gb/s PAM-4 Low-Power Nine-Tap Sliding-Block DFE in a 7-nm FinFET Wireline Receiver.

James Bailey, Hossein Shakiba, Ehud Nir, Grigory Marderfeld, Peter Krotnev, Marc-Andre LaCroix, David Cassan, Davide Tonietto

IEEE J. Solid State Circuits, 2022

2021

A 112Gb/s PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver.

James Bailey, Hossein Shakiba, Ehud Nir, Grigory Marderfeld, Peter Krotnev, Marc-Andre LaCroix, David Cassan

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019

A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOS.

Shayan Shahramian, Behzad Dehlaghi, Joshua Liang, Ryan Bespalko, Dustin Dunwell, James Bailey, Bo Wang, Alireza Sharif Bakhtiar, Michael O'Farrell, Kerry Tang, Anthony Chan Carusone, David Cassan, Davide Tonietto

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2014

Performance of edge tap decision feedback equalization methods for wireline receivers.

Chris D. Holdenried, Ryan Bespalko, Marcus van Ierssel, Mehrdad Ramezani, David Cassan, Siamak Sarvari, Saman Sadr

Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

2012

A low jitter 2.7mW/Gbps 180Gb/s 12-lane transmitter in a 40nm CMOS technology.

Kamran Farzan, Mehrdad Ramezani, Angus McLaren, Roman Pahuta, Nadeesha Amarasinghe, David Cassan, Saman Sadr

Proceedings of the 38th European Solid-State Circuit conference, 2012

2011

An 8.4mW/Gb/s 4-lane 48Gb/s multi-standard-compliant transceiver in 40nm digital CMOS technology.

Mehrdad Ramezani, Mohamed Abdalla, Ayal Shoval, Marcus van Ierssel, Afshin Rezayee, Angus McLaren, Chris D. Holdenried, Jennifer Pham, Eric So, David Cassan, Saman Sadr

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2003

A 1-V transformer-feedback low-noise amplifier for 5-GHz wireless LAN in 0.18-μm CMOS.

David Cassan, John R. Long

IEEE J. Solid State Circuits, 2003

2002

A 1 V 0.9 dB NF low noise amplifier for 5-6 GHz WLAN in 0.18 μm CMOS.

David Cassan, John R. Long

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002