Sao-Jie Chen

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Robustness Analysis of Neural Network Designs for ReLU Family and Batch Normalization.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Technologies and Applications of Artificial Intelligence, 2022

Empirical Study of Proposed Meltdown Attack Implementation on BOOM v3.

[BibT_eX]

[DOI]

Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

2021

A 24-GHz Fully Integrated CMOS Transceiver for FMCW Radar Applications.

[BibT_eX]

[DOI]

Yi-Pei Su

Chao-Yen Huang

IEEE J. Solid State Circuits, 2021

An Error Resilient Design Platform for Aggressively Reducing Power, Area and Routing Congestion.

[BibT_eX]

[DOI]

Tung-Liang Lin

Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

2020

A Platform of Resynthesizing a Clock Architecture Into Power-and-Area Effective Clock Trees.

[BibT_eX]

[DOI]

Tung-Liang Lin

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

DVFS Considering Spatial Correlation Timing and Process-Voltage-Temperature Variations.

[BibT_eX]

[DOI]

Tung-Liang Lin

Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

2018

Acceleration of Variant Discovery Tool in GATK.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

Application of BSS Algorithms for Breast Cancer Detection.

[BibT_eX]

[DOI]

Shu-Min Liu

Chen-Yu Li

Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

2017

Efficient Mobile Middleware for Seamless Communication of Prehospital Emergency Medicine.

[BibT_eX]

[DOI]

Proceedings of the Fourth Euro-China Conference on Intelligent Data Analysis and Applications, 2017

2016

A BiNoC architecture - aware task allocation and communication scheduling scheme.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2016

Tutorial 1B: Transistors: Past, present and future.

[BibT_eX]

[DOI]

Gururaj Shamanna

Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

Modeling and simulation of quantum-well infrared photodetectors.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

Design of a power-efficient ARM processor with a timing-error detection and correction mechanism.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE International System-on-Chip Conference, 2016

2015

Temporal and Spatial Denoising of Depth Maps.

[BibT_eX]

[DOI]

Sensors, 2015

An improved distributed video coding with low-complexity motion estimation at encoder.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

A novel flow fluidity meter for BiNoC bandwidth resource allocation.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

Using Back-Propagation Neural Network for Automatic Wheezing Detection.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Intelligent Information Hiding and Multimedia Signal Processing, 2015

Hardware implementation of a real-time distributed video decoder.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

Variable code length soft-output decoder of polar codes.

[BibT_eX]

[DOI]

Jung-Hong Po

Chu Yu

Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

An effective spatial-temporal denoising approach for depth images.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

Improved Fourier series expansion methods for electrocardiography analysis.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

2014

Accelerating Coverage Estimation Through Partial Model Checking.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2014

Unified Security and Safety Risk Assessment - A Case Study on Nuclear Power Plant.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Trustworthy Systems and their Applications, 2014

A prefetching scheme for Automatic Repeat-reQuest fault-tolerant on-chip network.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Machine Learning and Cybernetics, 2014

Improvement on a block-serial fully-overlapped QC-LDPC decoder for IEEE 802.11n.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2014

2013

Cycle-Efficient LFSR Implementation on Word-Based Microarchitecture.

[BibT_eX]

[DOI]

Jui-Chieh Lin

IEEE Trans. Computers, 2013

Non-minimal, turn-model based NoC routing.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2013

A unified link-layer fault-tolerant architecture for network-based many-core embedded systems.

[BibT_eX]

[DOI]

J. Syst. Archit., 2013

Novel time-multiplexing bidirectional on-chip network.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

Optimal fixedl-point fast fourier transform.

[BibT_eX]

[DOI]

Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Backward probing deadlock detection for networks-on-chip.

[BibT_eX]

[DOI]

Proceedings of the 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2013

Design of a (255, 239) Reed-Solomon decoder using a simplified step-by-step algorithm.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Consumer Electronics, 2013

A dual-code-rate memoryless Viterbi decoder for wireless communication systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2013

3D Bidirectional-Channel Routing Algorithm for Network-Based Many-Core Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Advanced Technologies, Embedded and Multimedia for Human-centric Computing, 2013

2012

Interlayer Bit Allocation for Scalable Video Coding.

[BibT_eX]

[DOI]

IEEE Trans. Image Process., 2012

Design and implementation of a low-power OFDM receiver for wireless communications.

[BibT_eX]

[DOI]

IEEE Trans. Consumer Electron., 2012

Design and Implementation of Block-Based Partitioning for Parallel Flip-Chip Power-Grid Analysis.

[BibT_eX]

[DOI]

Chun-Jen Wei

Howard Chen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

AND-OR tree-based mode selection for video coding.

[BibT_eX]

[DOI]

Signal Image Video Process., 2012

A scalable and fault-tolerant network routing scheme for many-core and multi-chip systems.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2012

Usability Evaluation of Mobile Medical Treatment Carts: Another Explanation by Information Engineers.

[BibT_eX]

[DOI]

J. Medical Syst., 2012

Networks on Chips: Structure and Design Methodologies.

[BibT_eX]

[DOI]

J. Electr. Comput. Eng., 2012

Networks-on-Chip: Architectures, Design Methodologies, and Case Studies.

[BibT_eX]

[DOI]

An-Yeu Andy Wu

Jiang Xu

J. Electr. Comput. Eng., 2012

Optimal Bit-allocation for Wavelet-based Scalable Video Coding.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012

Design of a low-power OFDM baseband receiver for wireless communications.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2012

Cycle-efficient lineary feedback shift register implementation on word-based micro-architecture.

[BibT_eX]

[DOI]

Jui-Chieh Lin

Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Congestion-aware scheduling for NoC-based reconfigurable systems.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

A Ubiquitous Scheme for a One-to-Many Switching Tunnel for Healthcare Utilization.

[BibT_eX]

[DOI]

Proceedings of the Fourth International Conference on Computational Intelligence, 2012

2011

A low-power 64-point pipeline FFT/IFFT processor for OFDM applications.

[BibT_eX]

[DOI]

IEEE Trans. Consumer Electron., 2011

A Bidirectional NoC (BiNoC) Architecture With Dynamic Self-Reconfigurable Channel.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Low power Gm-boosted differential Colpitts VCO.

[BibT_eX]

[DOI]

Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

Rate-allocation for spatially scalable video coding.

[BibT_eX]

[DOI]

Proceedings of the 7th International Symposium on Image and Signal Processing and Analysis, 2011

A fault-tolerant NoC scheme using bidirectional channel.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

2010

Optimal Multiple-Bit Huffman Decoding.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2010

An Automatic Optical Simulation-Based Lithography Hotspot Fix Flow for Post-Route Optimization.

[BibT_eX]

[DOI]

Yang-Shan Tong

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Web 2.0 Teacher Community in a National Health E-learning Network.

[BibT_eX]

[DOI]

Int. J. E Health Medical Commun., 2010

TM-FAR: Turn-Model based Fully Adaptive Routing for Networks on Chip.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

DyML: Dynamic Multi-Level flow control for Networks on Chip.

[BibT_eX]

[DOI]

Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

ARAL-CR: An adaptive reasoning and learning cognitive radio platform.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Embedded Computer Systems: Architectures, 2010

Perfect shuffling for cycle efficient puncturer and interleaver for software defined radio.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

QoS aware BiNoC architecture.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

Cycle efficient scrambler implementation for software defined radio.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Acoustics, 2010

2009

USVoD: A Large Scale Video-on-Demand System Based on Uniform Sampling Cache Mechanism.

[BibT_eX]

[DOI]

J. Inf. Sci. Eng., 2009

Evolution and Integration of Medical Laboratory Information System in an Asia National Medical Center.

[BibT_eX]

[DOI]

Po-Hsun Cheng

Jin-Shin Lai

IEICE Trans. Commun., 2009

An instruction set architecture independent design method for embedded OFDM-based software defined transmitter.

[BibT_eX]

[DOI]

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Parallel implementation of convolution encoder for software defined radio on DSP architecture.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

BiNoC: A bidirectional NoC architecture with dynamic self-reconfigurable channel.

[BibT_eX]

[DOI]

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Performance-energy tradeoffs in reliable NoCs.

[BibT_eX]

[DOI]

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

An automatic optical-simulation-based lithography hotspot fix flow for post-route optimization.

[BibT_eX]

[DOI]

Yang-Shan Tong

Chia-Wei Lin

Proceedings of the 2009 International Symposium on Physical Design, 2009

An Agile and Low Cost FPGA Implementation of MPEG-2 TS Remultiplexer for CATV Head-End Equipment.

[BibT_eX]

[DOI]

Proceedings of the 10th International Symposium on Pervasive Systems, 2009

A 900 MHz to 5.2 GHz Dual-loop Feedback Multi-band LNA.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Using XML for VLSI Physical Design Automation.

[BibT_eX]

[DOI]

Fong-Ming Shyu

Po-Hsun Cheng

Proceedings of the Algorithms and Architectures for Parallel Processing, 2009

Compositional Automata Reduction with Non-critical Path Slicing.

[BibT_eX]

Proceedings of the 2009 International Conference on Foundations of Computer Science, 2009

2008

A Collaborative Knowledge Management Process for Implementing Healthcare Enterprise Information Systems.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2008

Fluidity concept for NoC: A congestion avoidance and relief routing scheme.

[BibT_eX]

[DOI]

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Flow Maximization for NoC Routing Algorithms.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2007

Symbolic verification and error prediction methodology.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International SOC Conference, 2007

Design of a SIMD multimedia SoC platform.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE International SOC Conference, 2007

Modeling and Automatic Failure Analysis of Safety-Critical Systems Using Extended Safecharts.

[BibT_eX]

[DOI]

Yean-Ru Chen

Proceedings of the Computer Safety, 2007

A Study of Ubiquitous Monitor with RFID in an Elderly Nursing Home.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Multimedia and Ubiquitous Engineering (MUE 2007), 2007

Full-Chip Nanometer Routing Techniques.

[BibT_eX]

[DOI]

Tsung-Yi Ho

Yao-Wen Chang

Analog Circuits and Signal Processing, Springer, ISBN: 978-1-4020-6194-3, 2007

2006

RTWPMS: A Real-Time Wireless Physiological Monitoring System.

[BibT_eX]

[DOI]

IEEE Trans. Inf. Technol. Biomed., 2006

An Enhanced BSA for Floorplanning.

[BibT_eX]

[DOI]

Jyh Perng Fang

Yang-Shan Tong

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Optimal Multiple-Bit Huffman Decoding.

[BibT_eX]

[DOI]

Ya-Nan Wen

Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

A parameterizable digital-approximated 2D Gaussian smoothing filter for edge detection in noisy image.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Multiple-Symbol Parallel CAVLC Decoder for H.264/AVC.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Memory Access Optimization of Motion Estimation Algorithms on a Native SIMD PLX Processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Edge Detection on the Bayer Pattern.

[BibT_eX]

[DOI]

Chia-Hsiung Chen

Pei-Yung Hsiao

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

Crosstalk- and performance-driven multilevel full-chip routing.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

An auto-I/Q calibrated CMOS transceiver for 802.11g.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2005

A 6.25 mm2 2.4 GHz CMOS 802.11b Transceiver.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2005

Multilevel full-chip routing for the X-based architecture.

[BibT_eX]

[DOI]

Proceedings of the 42nd Design Automation Conference, 2005

Improving End-to-End Performance by Active Queue Management.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Advanced Information Networking and Applications (AINA 2005), 2005

2004

Fast postplacement optimization using functional symmetries.

[BibT_eX]

[DOI]

Chung-Kuan Cheng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Multilevel routing with jumper insertion for antenna avoidance.

[BibT_eX]

[DOI]

Tsung-Yi Ho

Yao-Wen Chang

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

Multilevel routing with antenna avoidance.

[BibT_eX]

[DOI]

Tsung-Yi Ho

Yao-Wen Chang

Proceedings of the 2004 International Symposium on Physical Design, 2004

2003

An Efficient Multi-Level Partitioning Algorithm for VLSI Circuits.

[BibT_eX]

[DOI]

Jong-Sheng Cherng

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Software Platform for Embedded Software Development.

[BibT_eX]

[DOI]

Proceedings of the Real-Time and Embedded Computing Systems and Applications, 2003

Minimizing Inter-Clock Coupling Jitter.

[BibT_eX]

[DOI]

Ming-Fu Hsiao

Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Minimizing coupling jitter by buffer resizing for coupled clock networks.

[BibT_eX]

[DOI]

Ming-Fu Hsiao

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A crosstalk aware two-pin net router.

[BibT_eX]

[DOI]

Ming-Fu Hsiao

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Tile-graph-based power planning.

[BibT_eX]

[DOI]

Jyh Perng Fang

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A Fast Crosstalk- and Performance-Driven Multilevel Routing System.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002

IETQ: An Incrementally Extensible Twisted Cube.

[BibT_eX]

[DOI]

Jyh-Shan Chang

Tzi-Dar Chiueh

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

VERTAF: An Object-Oriented Application Framework for Embedded Real-Time Systems.

[BibT_eX]

[DOI]

Proceedings of the 5th International Symposiun on Object Oriented Real-Time Distributed Computing, 2002

TCN: Scalable Hierarchical Hypercubes.

[BibT_eX]

[DOI]

Trong-Yen Lee

Proceedings of the 9th International Conference on Parallel and Distributed Systems, 2002

Printed circuit board routing and package layout codesign.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001

Symmetric and Programmable Multi-Chip Module for Low-Power Prototyping System.

[BibT_eX]

[DOI]

Mao-Hsu Yen

Sanko Lan

VLSI Design, 2001

A Three-Stage One-Sided Rearrangeable Polygonal Switching Network.

[BibT_eX]

[DOI]

Mao-Hsu Yen

Sanko Lan

IEEE Trans. Computers, 2001

A distributed and object-oriented framework for VLSI physical design automation.

[BibT_eX]

[DOI]

Fong-Ming Shyu

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

A wire segment reassignment algorithm for minimizing crosstalk for strait-type river routing.

[BibT_eX]

[DOI]

Jong-Sheng Cherng

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Formal Verification of Embedded Real-Time Software in Component-Based Application Frameworks.

[BibT_eX]

[DOI]

Proceedings of the 8th Asia-Pacific Software Engineering Conference (APSEC 2001), 2001

2000

Tutorial on VLSI Partitioning.

[BibT_eX]

[DOI]

Chung-Kuan Cheng

VLSI Design, 2000

Efficient routability check algorithms for segmented channel routing.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2000

A Java-Based Distributed System Framework for Real-Time Development.

[BibT_eX]

Proceedings of the 2000 ICDCS Workshops, April 10, 2000, Taipei, Taiwan, ROC, 2000

1999

Design of an efficient VLSI architecture for 2-D discrete wavelet transforms.

[BibT_eX]

[DOI]

Chu Yu

IEEE Trans. Consumer Electron., 1999

A Case Study in Hardware-Software Codesign of Distributed Systems - Vehicle Parking Management System.

[BibT_eX]

Trong-Yen Lee

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

Hardware-Software Coverification of Distributed Embedded Systems.

[BibT_eX]

Jih-Ming Fu

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

Efficient VLSI architecture for 2-D inverse discrete wavelet transforms.

[BibT_eX]

[DOI]

Chu Yu

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

An Even Wiring Approach to the Ball Grid Array Package Routing.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference On Computer Design, 1999

An Efficient Two-Level Partitioning Algorithm for VLSI Circuits.

[BibT_eX]

[DOI]

Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

An Automatic Router for the Pin Grid Array Package.

[BibT_eX]

[DOI]

Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

1998

ICOS: an intelligent concurrent object-oriented synthesis methodology for multiprocessor systems.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 1998

NEWS: a net-even-wiring system for the routing on a multilayer PGA package.

[BibT_eX]

[DOI]

Chwan-Ming Wang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998

1997

Hmap: a fast mapper for EPGAs using extended GBDD hash tables.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 1997

Object-Oriented Technology Transfer to Multiprocessor System-Level Synthesis.

[BibT_eX]

[DOI]

Trong-Yen Lee

Proceedings of the TOOLS 1997: 24th International Conference on Technology of Object-Oriented Languages and Systems, 1997

1996

PSM: an object-oriented synthesis approach to multiprocessor system design.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 1996

1995

Performance Bounds on Scheduling Parallel Tasks with Setup Time on Hypercube Systems.

[BibT_eX]

Jiann-Fu Lin

Informatica (Slovenia), 1995

Performance Bounds on Scheduling Parallel Tasks with Communication Cost.

[BibT_eX]

[DOI]

Jiann-Fu Lin

Win-Bin See

IEICE Trans. Inf. Syst., 1995

1994

A Linear Time Algorithm for Planar Moat Routing.

[BibT_eX]

[DOI]

J. Inf. Sci. Eng., 1994

1992

An H-V alternating router.

[BibT_eX]

[DOI]

Wu-Shiung Feng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

1991

Constrained via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems.

[BibT_eX]

[DOI]

Proceedings of the 28th Design Automation Conference, 1991

1990

GM Plan: a gate matrix layout algorithm based on artificial intelligence planning techniques.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

An H-V Tile-Expansion Router.

[BibT_eX]

[DOI]

Wu-Shiung Feng

J. Inf. Sci. Eng., 1990

Generalized terminal connectivity problem for multilayer layout scheme.

[BibT_eX]

[DOI]