Sebastian Weis

Affiliations:
  • University of Augsburg, Department of Computer Science, Germany


According to our database1, Sebastian Weis authored at least 19 papers between 2011 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2020
Hardware Multiversioning for Fail-Operational Multithreaded Applications.
Proceedings of the 32nd IEEE International Symposium on Computer Architecture and High Performance Computing, 2020

Investigating Transactional Memory for High Performance Embedded Systems.
Proceedings of the Architecture of Computing Systems - ARCS 2020, 2020

2018
Redundant Execution on Heterogeneous Multi-cores Utilizing Transactional Memory.
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018

2017
Fault-Tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support.
Proceedings of the Architecture of Computing Systems - ARCS 2017, 2017

2016
Fault-Tolerant Coarse-Grained Data-Flow Execution.
PhD thesis, 2016

Architectural Support for Fault Tolerance in a Teradevice Dataflow System.
Int. J. Parallel Program., 2016

POSTER: Fault-tolerant Execution on COTS Multi-core Processors with Hardware Transactional Memory Support.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2014
TERAFLUX: Harnessing dataflow in next generation teradevices.
Microprocess. Microsystems, 2014

Exploiting Intel TSX for fault-tolerant execution in safety-critical systems.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2013
Leveraging transactional memory for a predictable execution of applications composed of hard real-time and best-effort tasks.
Proceedings of the 21st International Conference on Real-Time Networks and Systems, 2013

Impact of Message Based Fault Detectors on Applications Messages in a Network on Chip.
Proceedings of the 21st Euromicro International Conference on Parallel, 2013

Fault Localization in NoCs Exploiting Periodic Heartbeat Messages in a Many-Core Environment.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Fault detection and tolerance mechanisms for future 1000 core systems.
Proceedings of the International Conference on High Performance Computing & Simulation, 2013


2012
Simulating the future kilo-x86-64 core processors and their infrastructure.
Proceedings of the 2012 Spring Simulation Multiconference, 2012

Fault Localization in NoCs by Timed Heartbeats.
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012

2011
Connectivity-Sensitive Algorithm for Task Placement on a Many-Core Considering Faulty Regions.
Proceedings of the 19th International Euromicro Conference on Parallel, 2011

Towards Fault Detection Units as an Autonomous Fault Detection Approach for Future Many-Cores.
Proceedings of the ARCS 2011, 2011

OC Techniques Applied to Solve Reliability Problems in Future 1000-Core Processors.
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011


  Loading...