Pedro Trancoso

According to our database1, Pedro Trancoso authored at least 79 papers between 1996 and 2019.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Decoupled Fused Cache: Fusing a Decoupled LLC with a DRAM Cache.
TACO, 2019

Energy-Efficient Runtime Management of Heterogeneous Multicores using Online Projection.
TACO, 2019

AVR: Reducing Memory Traffic with Approximate Value Reconstruction.
Proceedings of the 48th International Conference on Parallel Processing, 2019

2018

FusionCache: Using LLC tags for DRAM cache.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018



2017
SWITCHES: A Lightweight Runtime for Dataflow Execution of Tasks on Many-Cores.
TACO, 2017

Error-Resilient Server Ecosystems for Edge and Cloud Datacenters.
IEEE Computer, 2017

Heterogeneous- and NUMA-aware scheduling for many-core architectures.
Proceedings of the 10th ACM International Systems and Storage Conference, 2017

PHOENIX: efficient computation in memory.
Proceedings of the International Symposium on Memory Systems, 2017

Odd-ECC: on-demand DRAM error correcting codes.
Proceedings of the International Symposium on Memory Systems, 2017

SWAS: Stealing Work Using Approximate System-Load Information.
Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017

Single window stream aggregation using reconfigurable hardware.
Proceedings of the International Conference on Field Programmable Technology, 2017

Low-Cost Sub-5W Processors for Edge HPC.
Proceedings of the Euromicro Conference on Digital System Design, 2017

Using Personality Metrics to Improve Cache Interference Management in Multicore Processors.
Proceedings of the Computing Frontiers Conference, 2017

Auto-tuning Static Schedules for Task Data-flow Applications.
Proceedings of the 1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2017

2016
Integrating Transactions into the Data-Driven Multi-threading Model Using the TFlux Platform.
International Journal of Parallel Programming, 2016

Video SIMDBench: Benchmarking the Compiler Vectorization for Multimedia Applications.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
TFluxSCC: Exploiting Performance on Future Many-Core Systems through Data-Flow.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Getting Ready for Approximate Computing: Trading Parallelism for Accuracy for DSS Workloads.
Proceedings of the 14th International Symposium on Parallel and Distributed Computing, 2015

Scalable and Dynamic Global Power Management for Multicore Chips.
Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 4th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2015

Moving to memoryland: in-memory computation for existing applications.
Proceedings of the 12th ACM International Conference on Computing Frontiers, 2015

2014
TERAFLUX: Harnessing dataflow in next generation teradevices.
Microprocessors and Microsystems - Embedded Hardware Design, 2014

Getting ready for approximate computing: trading parallelism for accuracy for DSS workloads.
Proceedings of the Computing Frontiers Conference, CF'14, 2014

TFluxSCC: a case study for exploiting performance in future many-core systems.
Proceedings of the Computing Frontiers Conference, CF'14, 2014

2013
Guest Editorial: Computing Frontiers.
International Journal of Parallel Programming, 2013

Scalability and Efficiency of Database Queries on Future Many-Core Systems.
Proceedings of the 21st Euromicro International Conference on Parallel, 2013


Addressing the challenges of future large-scale many-core architectures.
Proceedings of the Computing Frontiers Conference, 2013

Producer-Consumer: The Programming Model for Future Many-Core Processors.
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013

2012
Fine-grain parallelism using multi-core, Cell/BE, and GPU Systems.
Parallel Computing, 2012

Guest Editorial: Computing Frontiers.
International Journal of Parallel Programming, 2012

Energy efficient stream-based configurable architecture for embedded platforms.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

LDPC Decoding on the Intel SCC.
Proceedings of the 20th Euromicro International Conference on Parallel, 2012

HPC Performance Domains on Multi-core Processors with Virtualization.
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012

2011
Trends in High-Performance Computing.
Computing in Science and Engineering, 2011

Exploring Decision Support Queries on Futured Many-Core Architectures.
Proceedings of the 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, 2011

Memory-, Bandwidth-, and Power-Aware Multi-core for a Graph Database Workload.
Proceedings of the Architecture of Computing Systems - ARCS 2011, 2011

Virtualization for Morphable Multi-Cores.
Proceedings of the ARCS 2011, 2011

2010
Application Acceleration with the Cell Broadband Engine.
Computing in Science and Engineering, 2010

High-Performance Computing on Heterogeneous Systems: Database Queries on CPU and GPU.
Proceedings of the High Performance Computing: From Grids and Clouds to Exascale, 2010

2009
Programming Abstractions and Toolchain for Dataflow Multithreading Architectures.
Proceedings of the Eighth International Symposium on Parallel and Distributed Computing, 2009

Fine-grain Parallelism Using Multi-core, Cell/BE, and GPU Systems: Accelerating the Phylogenetic Likelihood Function.
Proceedings of the ICPP 2009, 2009

Data parallel acceleration of decision support queries using Cell/BE and GPUs.
Proceedings of the 6th Conference on Computing Frontiers, 2009

2008
Rapid Prototyping of the Data-Driven Chip-Multiprocessor (d2-CMP) Using FPGAs.
Parallel Processing Letters, 2008

Dynamic adaptive data structures for monitoring data streams.
Data Knowl. Eng., 2008

HelperCoreDB: Exploiting multicore technology to improve database performance.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

TFlux: A Portable Platform for Data-Driven Multithreading on Commodity Multicore Systems.
Proceedings of the 2008 International Conference on Parallel Processing, 2008

Categorized Sliding Window in Streaming Data Management Systems.
Proceedings of the Database and Expert Systems Applications, 19th International Conference, 2008

Exploiting the GPU to accelerate DSS query execution.
Proceedings of the 5th Conference on Computing Frontiers, 2008

2007
Watt Matters Most? Design Space Exploration of High-Performance Microprocessors for Power-Performance Efficiency.
Journal of Circuits, Systems, and Computers, 2007

Chip multiprocessor based on data-driven multithreading model.
IJHPSA, 2007

Thermal-Aware Scheduling for Future Chip Multiprocessors.
EURASIP J. Emb. Sys., 2007

HelperCore_DB: Exploiting Multicore Technology for Databases.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006
Data-Driven Multithreading Using Conventional Microprocessors.
IEEE Trans. Parallel Distrib. Syst., 2006

Dynamic count filters.
SIGMOD Record, 2006

Cacheflow: Cache Optimizations for Data Driven Multithreading.
Parallel Processing Letters, 2006

A Case for Chip Multiprocessors Based on the Data-Driven Multithreading Model.
International Journal of Parallel Programming, 2006

Building and Validating a Reduced TPC-H Benchmark.
Proceedings of the 14th International Symposium on Modeling, 2006

Adaptive High-End Microprocessor for Power-Performance Efficiency.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Thermal-Aware Scheduling: A Solution for Future Chip Multiprocessors Thermal Problems.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Hardware Budget and Runtime System for Data-Driven Multithreaded Chip Multiprocessor.
Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006

2005
DDM-CMP: Data-Driven Multithreading on a Chip Multiprocessor.
Proceedings of the Embedded Computer Systems: Architectures, 2005

Reducing TPC-H Benchmarking Time.
Proceedings of the Advances in Informatics, 2005

TSIC: Thermal Scheduling Simulator for Chip Multiprocessors.
Proceedings of the Advances in Informatics, 2005

Initial Experiences Porting a Bioinformatics Application to a Graphics Processor.
Proceedings of the Advances in Informatics, 2005

One size does not fit all: a case for heterogeneous multiprocessor systems.
Proceedings of the AC 2005, 2005

Topic 7 - Parallel Computer Architecture and ILP.
Proceedings of the Euro-Par 2005, Parallel Processing, 11th International Euro-Par Conference, Lisbon, Portugal, August 30, 2005

Exploring Graphics Processor Performance for General Purpose Applications.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Dynamic Split: Flexible Border Between Instruction and Data Cache.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Design Space Navigation for Neighboring Power-Performance Efficient Microprocessor Configurations.
Proceedings of the Systems Aspects in Organic and Pervasive Computing, 2005

2004
CacheFlow: A Short-Term Optimal Cache Management Policy for Data Driven Multithreading.
Proceedings of the Euro-Par 2004 Parallel Processing, 2004

What to Adapt in a High-Performance Microprocessor.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2002
In-memory Parallelism for Database Workloads.
Proceedings of the Euro-Par 2002, 2002

1999
Cache Optimization for Memory-Resident Decision Support Commercial Workloads.
Proceedings of the IEEE International Conference On Computer Design, 1999

Detailed Characterization of a Quad Pentium Pro Server Running TPC-D.
Proceedings of the IEEE International Conference On Computer Design, 1999

1997
The Memory Performance of DSS Commercial Workloads in Shared-Memory Multiprocessors.
Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997

1996
The Impact of Speeding up Critical Sections with Data Prefetching and Forwarding.
Proceedings of the 1996 International Conference on Parallel Processing, 1996


  Loading...