According to our database1, Sergei Kostin authored at least 22 papers between 2007 and 2018.
Legend:Book In proceedings Article PhD thesis Other
Fast identification of true critical paths in sequential circuits.
Microelectronics Reliability, 2018
Hierarchical Timing-Critical Paths Analysis in Sequential Circuits.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Parallel Critical Path Tracing Fault Simulation in Sequential Circuits.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018
A scalable technique to identify true critical paths in sequential circuits.
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017
Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits.
J. Electronic Testing, 2016
A novel random approach to diagnostic test generation.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
Gate-level modelling of NBTI-induced delays under process variations.
Proceedings of the 17th Latin-American Test Symposium, 2016
A tool set for teaching design-for-testability of digital circuits.
Proceedings of the 11th European Workshop on Microelectronics Education, 2016
Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG.
Proceedings of the 16th Latin-American Test Symposium, 2015
SPICE-Inspired Fast Gate-Level Computation of NBTI-induced Delays in Nanoscale Logic.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015
Hierarchical identification of NBTI-critical gates in nanoscale logic.
Proceedings of the 15th Latin American Test Workshop, 2014
Accurate Dialysis Dose Evaluation and Extrapolation Algorithms During Online Optical Dialysis Monitoring.
IEEE Trans. Biomed. Engineering, 2013
Synthesis of multiple fault oriented test groups from single fault test sets.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013
Identifying NBTI-Critical Paths in Nanoscale Logic.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
About robustness of test patterns regarding multiple faults.
Proceedings of the 13th Latin American Test Workshop, 2012
How to Prove that a Circuit is Fault-Free?
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Multiple stuck-at-fault detection theorem.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012
Defect-oriented module-level fault diagnosis in digital circuits.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011
Diagnozer: A laboratory tool for teaching research in diagnosis of electronic systems.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2009
Block-Level Fault Model-Free Debug and Diagnosis in Digital Systems.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009
Embedded fault diagnosis in digital systems with BIST.
Microprocessors and Microsystems - Embedded Hardware Design, 2008
Fault Diagnosis in Integrated Circuits with BIST.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007