Seyed Nima Mozaffari

Orcid: 0000-0003-1719-6815

According to our database1, Seyed Nima Mozaffari authored at least 10 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2022
On-Die Noise Measurement During Automatic Test Equipment (ATE) Testing and In-System-Test (IST).
Proceedings of the 40th IEEE VLSI Test Symposium, 2022

Observation Point Insertion Using Deep Learning.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2019
Low Power Artificial Neural Network Architecture.
CoRR, 2019

An Efficient Supervised Learning Method to Predict Power Supply Noise During At-speed Test.
Proceedings of the IEEE International Test Conference, 2019

2018
A Generalized Approach to Implement Efficient CMOS-Based Threshold Logic Functions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

An Aging Resilient Neural Network Architecture.
Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, 2018

2017
More Efficient Testing of Metal-Oxide Memristor-Based Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Reducing power, area, and delay of threshold logic gates considering non-integer weights.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A new method to identify threshold logic functions.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2015
Fast march tests for defects in resistive memory.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015


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