Shady Agwa

According to our database1, Shady Agwa authored at least 11 papers between 2019 and 2024.

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Bibliography

2024
An Energy-efficient Capacitive-Memristive Content Addressable Memory.
CoRR, 2024

2023
Bent-Pyramid: Towards A Quasi-Stochastic Data Representation for AI Hardware.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A 1T1R+2T Analog Content-Addressable Memory Pixel for Online Template Matching.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

EVE: Ephemeral Vector Engines.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

CIFER: A 12nm, 16mm<sup>2</sup>, 22-Core SoC with a 1541 LUT6/mm<sup>2</sup> 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022
A CMOS-based Characterisation Platform for Emerging RRAM Technologies.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

High-Density Digital RRAM-based Memory with Bit-line Compute Capability.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
Layout-Based Evaluation of Read/Write Performance of SOT-MRAM and SOTFET-RAM.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2020
Implementing Low-Diameter On-Chip Networks for Manycore Processors Using a Tiled Physical Design Methodology.
Proceedings of the 14th IEEE/ACM International Symposium on Networks-on-Chip, 2020

Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator using In-Situ Processing-In-SRAM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019


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