Jonathan Balkind

Orcid: 0000-0003-1443-1373

According to our database1, Jonathan Balkind authored at least 22 papers between 2014 and 2023.

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Bibliography

2023
Loop Rerolling for Hardware Decompilation.
Proc. ACM Program. Lang., 2023

OpenPiton Optimizations Towards High Performance Manycores.
Proceedings of the 16th International Workshop on Network on Chip Architectures, 2023

Fast Behavioural RTL Simulation of 10B Transistor SoC Designs with Metro-Mpi.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

DECADES: A 67mm<sup>2</sup>, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

CIFER: A 12nm, 16mm<sup>2</sup>, 22-Core SoC with a 1541 LUT6/mm<sup>2</sup> 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

Cohort: Software-Oriented Acceleration for Heterogeneous SoCs.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

A Prediction System Service.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
OPDB: A Scalable and Modular Design Benchmark.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Establishing Cooperative Computation with Hardware Embassies.
Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022

Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

2021
Wire sorts: a language abstraction for safe hardware composition.
Proceedings of the PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2021

2020
OpenPiton at 5: A Nexus for Open and Agile Hardware Design.
IEEE Micro, 2020

BYOC: A "Bring Your Own Core" Framework for Heterogeneous-ISA Research.
Proceedings of the ASPLOS '20: Architectural Support for Programming Languages and Operating Systems, 2020

2019
OpenPiton: an open source hardware platform for your research.
Commun. ACM, 2019

Architectural Implications of Function-as-a-Service Computing.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

JuxtaPiton: Enabling Heterogeneous-ISA Research with RISC-V and SPARC FPGA Soft-cores.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018
Power and Energy Characterization of an Open Source 25-Core Manycore Processor.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2017
Project snowflake: non-blocking safe manual memory management in .NET.
Proc. ACM Program. Lang., 2017

Piton: A Manycore Processor for Multitenant Clouds.
IEEE Micro, 2017

2016
Piton: A 25-core academic manycore research processor.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

OpenPiton: An Open Source Manycore Research Framework.
Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, 2016

2014
Execution Drafting: Energy Efficiency through Computation Deduplication.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014


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