Shiwei Wang

Orcid: 0000-0002-5450-2108

Affiliations:
  • The University of Edinburgh, Edinburgh, UK


According to our database1, Shiwei Wang authored at least 31 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Memristor-Assisted Background Calibration for SAR ADCs: A Feasibility Study.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023

A Neural Recording System with 16 Reconfigurable Front-end Channels and Memristive Processing/Memory Unit.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

QuickNN: Python Toolbox for Training and Optimizing ANN for Hardware Implementation.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

An Improved Data-Driven Memristor Model Accounting for Sequences Stimulus Features.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Power, Performance and Area Optimization of Parallel Load Counters through Logic Minimization and TSPC-FF Utilization.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

Tone Stimulus Detection For Rats Using RRAM-Based Local Field Potential Monitoring.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

An Integrated CMOS/Memristor Bio-Processor for Re-configurable Neural Signal Processing.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2023

2022
A Compact, Low-Power Analog Front-End With Event-Driven Input Biasing for High-Density Neural Recording in 22-nm FDSOI.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Multi-State Memristors and Their Applications: An Overview.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

Memristor-assisted Background Calibration for Analog-to-Digital Converter.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Offset Rejection in a DC-Coupled Hybrid CMOS/Memristor Neural Front-End.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Hybrid CMOS/Memristor Front-End for Multiunit Activity Processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A CMOS-based Characterisation Platform for Emerging RRAM Technologies.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Delta-Sigma Modulator Design Using a Memristive FIR DAC.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
A 77-dB DR 16-Ch 2<sup>nd</sup>-order Δ-ΔΣ Neural Recording Chip with 0.0077mm<sup>2</sup>/Ch.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

RRAM-Based STDP Network for Edge Computing in Wearable/Implantable Devices.
Proceedings of the 18th International SoC Design Conference, 2021

2020
Asynchronous Event-driven Encoder With Simultaneous Temporal Envelope and Phase Extraction for Cochlear Implants.
IEEE Trans. Biomed. Circuits Syst., 2020

2019
A Compact Quad-Shank CMOS Neural Probe With 5, 120 Addressable Recording Sites and 384 Fully Differential Parallel Channels.
IEEE Trans. Biomed. Circuits Syst., 2019

2018
A Multimodal CMOS MEA for High-Throughput Intracellular Action Potential Measurements and Impedance Spectroscopy in Drug-Screening Applications.
IEEE J. Solid State Circuits, 2018

A 16384-electrode 1024-channel multimodal CMOS MEA for high-throughput intracellular action potential measurements and impedance spectroscopy in drug-screening applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
A Neural Probe With Up to 966 Electrodes and Up to 384 Configurable Channels in 0.13 µm SOI CMOS.
IEEE Trans. Biomed. Circuits Syst., 2017

Time Multiplexed Active Neural Probe with 1356 Parallel Recording Sites.
Sensors, 2017

An FPGA-based adaptive tuning control for a cochlea-mimicking filter channel.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017

Calibration Method and Simulation of Kinematic Parameters for Light-Weight Robot Based on Flexible Error Analysis.
Proceedings of the 2nd International Conference on Cybernetics, Robotics and Control, 2017

2016
A Power-Efficient Capacitive Read-Out Circuit With Parasitic-Cancellation for MEMS Cochlea Sensors.
IEEE Trans. Biomed. Circuits Syst., 2016

Time multiplexed active neural probe with 678 parallel recording sites.
Proceedings of the 46th European Solid-State Device Research Conference, 2016

2015
A Bio-Realistic Analog CMOS Cochlea Filter With High Tunability and Ultra-Steep Roll-Off.
IEEE Trans. Biomed. Circuits Syst., 2015

Design of a silicon cochlea system with biologically faithful response.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015

2013
A floating active inductor based CMOS cochlea filter with high tunability and sharp cut-off.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A low-noise interface circuit for MEMS cochlea-mimicking acoustic sensors.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Design of a spike event coded RGT microphone for neuromorphic auditory systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011


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