Shaofeng Guo

According to our database1, Shaofeng Guo authored at least 8 papers between 2017 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2020
Circuit Reliability Comparison Between Stochastic Computing and Binary Computing.
IEEE Trans. Circuits Syst., 2020

2019
OMI/TMI-based Modeling and Fast Simulation of Random Telegraph Noise (RTN) in Advanced Logic Devices and Circuits.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018
Investigation on NBTI-induced dynamic variability in nanoscale CMOS devices: Modeling, experimental evidence, and impact on circuits.
Microelectron. Reliab., 2018

Evaluation of SRAM V<sub>min</sub> shift induced by random telegraph noise (RTN): physical understanding and prediction method.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Investigation on the amplitude coupling effect of random telegraph noise (RTN) in nanoscale FinFETs.
Proceedings of the IEEE International Reliability Physics Symposium, 2018

Layout-dependent aging mitigation for critical path timing.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Towards reliability-aware circuit design in nanoscale FinFET technology: - New-generation aging model and circuit reliability simulator.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

How close to the CMOS voltage scaling limit for FinFET technology? - Near-threshold computing and stochastic computing.
Proceedings of the 12th IEEE International Conference on ASIC, 2017


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