Shengzhe Yan

Orcid: 0000-0002-0649-3032

According to our database1, Shengzhe Yan authored at least 7 papers between 2023 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2025
A High-Density Energy-Efficient CNM Macro Using Hybrid RRAM and SRAM for Memory-Bound Applications.
IEEE Trans. Very Large Scale Integr. Syst., August, 2025

An RRAM-Based Computing-in-Memory Macro With Low-Power Readout/Hold Circuits and Activation Differential Strategy for AdderNet.
IEEE Trans. Very Large Scale Integr. Syst., July, 2025

A monolithic 3D IGZO-RRAM-SRAM-integrated architecture for robust and efficient compute-in-memory enabling equivalent-ideal device metrics.
Sci. China Inf. Sci., 2025

2024
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture.
IEEE J. Solid State Circuits, August, 2024

A 41.7TOPS/W@INT8 Computing-in-Memory Processor with Zig-Zag Backbone-Systolic CIM and Block/Self-Gating CAM for NN/Recommendation Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

IG-CRM: Area/Energy-Efficient IGZO-Based Circuits and Architecture Design for Reconfigurable CIM/CAM Applications.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Recent progress in InGaZnO FETs for high-density 2T0C DRAM applications.
Sci. China Inf. Sci., October, 2023


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