Wenyu Sun
Orcid: 0000-0002-4793-0972
According to our database1,
Wenyu Sun
authored at least 84 papers
between 1996 and 2023.
Collaborative distances:
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Bibliography
2023
Measurement Method of Physical Parameters of Two-Phase Flow Based on Dual-Frequency Demodulation.
Sensors, December, 2023
A Heterogeneous Microprocessor Based on All-Digital Compute-in-Memory for End-to-End AIoT Inference.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2023
Extreme-Low-Speed Heavy Load Bearing Fault Diagnosis by Using Improved RepVGG and Acoustic Emission Signals.
Sensors, April, 2023
An RRAM-Based Digital Computing-in-Memory Macro With Dynamic Voltage Sense Amplifier and Sparse-Aware Approximate Adder Tree.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
IEEE Trans. Multim., 2023
Spectroscopy-Guided Discovery of Three-Dimensional Structures of Disordered Materials with Diffusion Models.
CoRR, 2023
A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A 28nm 2D/3D Unified Sparse Convolution Accelerator with Block-Wise Neighbor Searcher for Large-Scaled Voxel-Based Point Cloud Network.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
SOLE: Hardware-Software Co-design of Softmax and LayerNorm for Efficient Transformer Inference.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
A 28nm 1.07TFLOPS/mm<sup>2</sup> Dynamic-Precision Training Processor with Online Dynamic Execution and Multi- Level-Aligned Block-FP Processing.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
Semantic Guided Fine-Grained Point Cloud Quantization Framework for 3D Object Detection.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023
A Demonstration Platform for Large-Scaled Point Cloud Network Based on 28nm 2D/3D Unified Sparse Convolution Accelerator.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse.
IEEE J. Solid State Circuits, 2022
A 65-nm Energy-Efficient Interframe Data Reuse Neural Network Accelerator for Video Applications.
IEEE J. Solid State Circuits, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
C-RRAM: A Fully Input Parallel Charge-Domain RRAM-based Computing-in-Memory Design with High Tolerance for RRAM Variations.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
An Once-for-All Budgeted Pruning Framework for ConvNets Considering Input Resolution.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops, 2022
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
Dynamic CNN Accelerator Supporting Efficient Filter Generator with Kernel Enhancement and Online Channel Pruning.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
Sparsity-Aware Non-Volatile Computing-In-Memory Macro with Analog Switch Array and Low-Resolution Current-Mode ADC.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
2021
STICKER-T: An Energy-Efficient Neural Network Processor Using Block-Circulant Algorithm and Unified Frequency-Domain Acceleration.
IEEE J. Solid State Circuits, 2021
Proceedings of the 18th International SoC Design Conference, 2021
Part Uncertainty Estimation Convolutional Neural Network For Person Re-Identification.
Proceedings of the 2021 IEEE International Conference on Image Processing, 2021
A Sort-Less FPGA-Based Non-Maximum Suppression Accelerator using Multi-Thread Computing and Binary Max Engine for Object Detection.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
Sensors, 2020
J. Glob. Optim., 2020
An Once-for-All Budgeted Pruning Framework for ConvNets Considering Input Resolution.
CoRR, 2020
CoRR, 2020
CoRR, 2020
High-Quality Single-Model Deep Video Compression with Frame-Conv3D and Multi-frame Differential Modulation.
Proceedings of the Computer Vision - ECCV 2020, 2020
A 112-765 GOPS/W FPGA-based CNN Accelerator using Importance Map Guided Adaptive Activation Sparsification for Pix2pix Applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020
2019
Design Methodology for TFT-Based Pseudo-CMOS Logic Array With Multilayer Interconnection Architecture and Optimization Algorithms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
An Auto Loss Co Jian Zhaompensation System for Capacitive-Coupled Body Channel Communication.
IEEE Trans. Biomed. Circuits Syst., 2019
Dynamic Channel Modeling and OFDM System Analysis for Capacitive Coupling Body Channel Communication.
IEEE Trans. Biomed. Circuits Syst., 2019
On semi-definiteness and minimal H-eigenvalue of a symmetric space tensor using nonnegative polynomial optimization techniques.
Signal Process. Image Commun., 2019
A seminorm regularized alternating least squares algorithm for canonical tensor decomposition.
J. Comput. Appl. Math., 2019
A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1 × Higher TOPS/mm<sup>2</sup>and 6T HBST-TRAM-Based 2D Data-Reuse Architecture.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision Workshops, 2019
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision Workshops, 2019
A 4-Mbps 41-pJ/bit On-off Keying Transceiver for Body-channel Communication with Enhanced Auto Loss Compensation Technique.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019
AERIS: area/energy-efficient 1T2R ReRAM based processing-in-memory neural network system-on-a-chip.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
An Investigation on Inter-degeneration Effect in Body Channel Based Multi-node Wireless Power Transfer.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018
Mechanical strain and temperature aware design methodology for thin-film transistor based pseudo-CMOS logic array.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
An 8b 0.8kS/s configurable VCO-based ADC using oxide TFTs with Inkjet printing interconnection.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Design Methodology for Thin-Film Transistor Based Pseudo-CMOS Logic Array with Multi-Layer Interconnect Architecture.
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
HW/SW co-design of nonvolatile IO system in energy harvesting sensor nodes for optimal data acquisition.
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
Math. Comput., 2015
A Barzilai and Borwein scaling conjugate gradient method for unconstrained optimization problems.
Appl. Math. Comput., 2015
2014
An alternating structured trust region algorithm for separable optimization problems with nonconvex constraints.
Comput. Optim. Appl., 2014
An iteratively approximated gradient projection algorithm for sparse signal reconstruction.
Appl. Math. Comput., 2014
2013
Positive Semidefinite Generalized Diffusion Tensor Imaging via Quadratic Semidefinite Programming.
SIAM J. Imaging Sci., 2013
A hybrid splitting method for variational inequality problems with separable structure.
Optim. Methods Softw., 2013
A Conic Affine Scaling Dogleg Method for nonlinear Optimization with Bound Constraints.
Asia Pac. J. Oper. Res., 2013
2012
A Predictor-corrector algorithm with multiple corrections for convex quadratic programming.
Comput. Optim. Appl., 2012
2011
Appl. Math. Lett., 2011
A full-NT-step infeasible interior-point algorithm for SDP based on kernel functions.
Appl. Math. Comput., 2011
2010
J. Syst. Sci. Complex., 2010
Global convergence of a filter-trust-region algorithm for solving nonsmooth equations.
Int. J. Comput. Math., 2010
Nonmonotone second-order Wolfe's line search method for unconstrained optimization problems.
Comput. Math. Appl., 2010
Asia Pac. J. Oper. Res., 2010
A nonmonotone globalization algorithm with preconditioned gradient path for unconstrained optimization.
Appl. Math. Comput., 2010
Appl. Math. Comput., 2010
2009
Int. J. Syst. Sci., 2009
A modified projection method with a new direction for solving variational inequalities.
Appl. Math. Comput., 2009
2008
On the global convergence of a nonmonotone proximal bundle method for convex nonsmooth minimization.
Optim. Methods Softw., 2008
Comput. Optim. Appl., 2008
A self-adaptive projection method with improved step-size for solving variational inequalities.
Comput. Math. Appl., 2008
Numerical research on the sensitivity of nonmonotone trust region algorithms to their parameters.
Comput. Math. Appl., 2008
2007
An infeasible interior-point algorithm with full-Newton step for linear optimization.
Numer. Algorithms, 2007
2006
A practical penalty trust-region method for equality-constrained optimization problems.
Appl. Math. Comput., 2006
2005
Optim. Methods Softw., 2005
Appl. Math. Comput., 2005
2004
Appl. Math. Comput., 2004
2002
Appl. Math. Comput., 2002
2001
Ann. Oper. Res., 2001
1999
Appl. Math. Comput., 1999
1998
SIAM J. Matrix Anal. Appl., July, 1998
Newton's method and quasi-Newton - SQP method for general LC<sup>1</sup> constrained optimization.
Appl. Math. Comput., 1998
1996
Int. J. Comput. Math., 1996