Tae Hee Han
Orcid: 0000-0001-8508-7536
According to our database1,
Tae Hee Han
authored at least 37 papers
between 2009 and 2024.
Collaborative distances:
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Bibliography
2024
OWBM: OSNR-Aware Wavelength Allocation and Branching Methods for Multicast Routing in Custom Topology-Based Optical Network-on-Chips.
IEEE Access, 2024
RISC-VR-Extension: Advancing Efficiency with Rented-Pipeline for Edge DNN Processing.
Proceedings of the International Conference on Artificial Intelligence in Information and Communication , 2024
2023
IEEE Trans. Parallel Distributed Syst., 2023
RL-Based Cache Replacement: A Modern Interpretation of Belady's Algorithm With Bypass Mechanism and Access Type Analysis.
IEEE Access, 2023
NCDE: In-Network Caching for Directory Entries to Expedite Data Access in Tiled-Chip Multiprocessors.
IEEE Access, 2023
SFAO: Sign-Flipping-Aware Optimization for Early-Stopping of Binarized Neural Networks.
IEEE Access, 2023
Binarized Neural Network With Parameterized Weight Clipping and Quantization Gap Minimization for Online Knowledge Distillation.
IEEE Access, 2023
2022
On-the-Fly Lowering Engine: Offloading Data Layout Conversion for Convolutional Neural Networks.
IEEE Access, 2022
2021
IEEE Access, 2021
Task Parallelism-Aware Deep Neural Network Scheduling on Multiple Hybrid Memory Cube-Based Processing-in-Memory.
IEEE Access, 2021
Rapid Topology Generation and Core Mapping of Optical Network-on-Chip for Heterogeneous Computing Platform.
IEEE Access, 2021
2020
System-Level Signal Analysis Methodology for Optical Network-on-Chip Using Linear Model-Based Characterization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Extended Worst-Case OSNR Searching Algorithm for Optical Network-on-Chip Using a Semi-Greedy Heuristic With Adaptive Scan Range.
IEEE Access, 2020
2019
Proceedings of the 2019 International SoC Design Conference, 2019
2018
Insertion Loss-Aware Routing Analysis and Optimization for a Fat-Tree-Based Optical Network-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Adaptive thermal property control technique for holistic thermal management of mobile devices.
IEICE Electron. Express, 2018
IEICE Electron. Express, 2018
Reliability Optimization of ReRAM Architecture using Heterogeneous Error Correcting Code Scheme.
Proceedings of the International SoC Design Conference, 2018
Proceedings of the International SoC Design Conference, 2018
2017
Non-linear library characterization method for FinFET logic cells by L1-minimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
2016
AFSEM: Advanced frequent subcircuit extraction method by graph mining approach for optimized cell library developments.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Sudden-voltage-drop protection technique for enhancing the reliability of mobile devices under low battery conditions.
IEICE Electron. Express, 2015
2014
IEICE Electron. Express, 2014
IEICE Electron. Express, 2014
An improvement technique for the test compression ratio and application time of multiple expansion scan chain based SoC using new cost function.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
2013
A shortest path adaptive routing technique for minimizing path collisions in hybrid optical network-on-chip.
J. Syst. Archit., 2013
2012
IEICE Electron. Express, 2012
Proceedings of the International SoC Design Conference, 2012
2011
Des. Autom. Embed. Syst., 2011
2010
2009
IEICE Electron. Express, 2009
IEEE Commun. Lett., 2009
IEEE Commun. Mag., 2009
Proceedings of the 70th IEEE Vehicular Technology Conference, 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009