Hyo-Sig Won

According to our database1, Hyo-Sig Won authored at least 9 papers between 2003 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Non-linear library characterization method for FinFET logic cells by L1-minimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

AFSEM: Advanced frequent subcircuit extraction method by graph mining approach for optimized cell library developments.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 14 nm FinFET 128 Mb SRAM With V<sub>MIN</sub> Enhancement Techniques for Low-Power Applications.
IEEE J. Solid State Circuits, 2015

2012
Thermal-aware body bias modulation for high performance mobile core.
Proceedings of the International SoC Design Conference, 2012

2003
An MTCMOS design methodology and its application to mobile computing.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003


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