Taejoong Song

According to our database1, Taejoong Song authored at least 27 papers between 2006 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2020
An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache.
IEEE Access, 2020

A 14.7Mb/mm<sup>2</sup> 28nm FDSOI STT-MRAM with Current Starved Read Path, 52Ω/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT Reference.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019
Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Bitline Charge-Recycling SRAM Write Assist Circuitry for $V_{\mathrm{MIN}}$ Improvement and Energy Saving.
IEEE J. Solid State Circuits, 2019

A Voltage and Temperature Tracking SRAM Assist Supporting 740mV Dual-Rail Offset for Low-Power and High-Performance Applications in 7nm EUV FinFET Technology.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018
Half-and-Half Compare Content Addressable Memory with Charge-Sharing Based Selective Match-Line Precharge Scheme.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A 7nm FinFET SRAM using EUV lithography with dual write-driver-assist circuitry for low-voltage applications.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Embedded MRAM Macro for eFlash Replacement.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization.
IEEE J. Solid State Circuits, 2017

12.2 A 7nm FinFET SRAM macro using EUV lithography for peripheral repair analysis.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

28-nm 1T-1MTJ 8Mb 64 I/O STT-MRAM with symmetric 3-section reference structure and cross-coupled sensing amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 14 nm FinFET 128 Mb SRAM With V<sub>MIN</sub> Enhancement Techniques for Low-Power Applications.
IEEE J. Solid State Circuits, 2015

2014
13.2 A 14nm FinFET 128Mb 6T SRAM with VMIN-enhancement techniques for low-power applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

Pseudo NMOS based sense amplifier for high speed single-ended SRAM.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2012
A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Low-Power Technique for SRAM-Based On-Chip Arbitrary-Waveform Generator.
IEEE Trans. Instrum. Meas., 2011

2010
A 122-mW Low-Power Multiresolution Spectrum-Sensing IC With Self-Deactivated Partial Swing Techniques.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

Subthreshold current mode matrix determinant computation for analog signal processing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Fully Integrated UHF-Band CMOS Receiver With Multi-Resolution Spectrum Sensing (MRSS) Functionality for IEEE 802.22 Cognitive Radio Applications.
IEEE J. Solid State Circuits, 2009

2008
A Fully-Integrated UHF Receiver with Multi-Resolution Spectrum-Sensing (MRSS) Functionality for IEEE 802.22 Cognitive-Radio Applications.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A Cross-layer Cognitive Radio Testbed for the Evaluation of Spectrum Sensing Receiver and Interference Analysis.
Proceedings of the 3rd International ICST Conference on Cognitive Radio Oriented Wireless Networks and Communications, 2008

2006
Implementation Issues of A Wideband Multi-Resolution Spectrum Sensing (MRSS) Technique for Cognitlve Radio (CR) Systems.
Proceedings of the 1st International ICST Conference on Cognitive Radio Oriented Wireless Networks and Communications, 2006


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