Takatsugu Ono

According to our database, Takatsugu Ono authored at least 27 papers between 2009 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Evaluating floating-point multipliers with opto-electrical hybrid circuits.

Takumi Inaba, Takatsugu Ono, Koji Inoue, Satoshi Kawakami

Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022

An Edge Autonomous Lamp Control with Camera Feedback.

Satoshi Matsushita, Teruo Tanimoto, Satoshi Kawakami, Takatsugu Ono, Koji Inoue

Proceedings of the 8th IEEE World Forum on Internet of Things, 2022

A Hybrid Opto-Electrical Floating-point Multiplier.

Takumi Inaba, Takatsugu Ono, Koji Inoue, Satoshi Kawakami

Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022

Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device.

Iori Ishikawa, Ikki Nagaoka, Ryota Kashima, Koki Ishida, Kosuke Fukumitsu, Keitaro Oka, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Akira Fujimaki, Koji Inoue

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Superconductor Computing for Neural Networks.

Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue

IEEE Micro, 2021

2020

32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic.

Koki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, Koji Inoue

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices.

Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Enhancing a manycore-oriented compressed cache for GPGPU.

Keitaro Oka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Koji Inoue

Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2020

2019

Radio Propagation Characteristics-based Spoofing Attack Prevention on Wireless Connected Devices.

Mihiro Sonoyama, Takatsugu Ono, Haruichi Kanaya, Osamu Muta, Smruti R. Sarangi, Koji Inoue

J. Inf. Process., 2019

Critical Path Based Microarchitectural Bottleneck Analysis for Out-of-Order Execution.

Teruo Tanimoto, Takatsugu Ono, Koji Inoue

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Evaluating the Impact of Energy Efficient Networks on HPC Workloads.

Giorgis Georgakoudis, Nikhil Jain, Takatsugu Ono, Koji Inoue, Shinobu Miwa, Abhinav Bhatele

Proceedings of the 26th IEEE International Conference on High Performance Computing, 2019

F-LaaS: A Control-Flow-Attack Immune License-as-a-Service Model.

Sandeep Kumar, Diksha Moolchandani, Takatsugu Ono, Smruti R. Sarangi

Proceedings of the 2019 IEEE International Conference on Services Computing, 2019

2018

Parallel Precomputation with Input Value Prediction for Model Predictive Control Systems.

Satoshi Kawakami, Takatsugu Ono, Toshiyuki Ohtsuka, Koji Inoue

IEICE Trans. Inf. Syst., 2018

Towards Ultra-High-Speed Cryogenic Single-Flux-Quantum Computing.

Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue

IEICE Trans. Electron., 2018

Real-Time Frame-Rate Control for Energy-Efficient On-Line Object Tracking.

Yusuke Inoue, Takatsugu Ono, Koji Inoue

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs.

Satoshi Imamura, Yuichiro Yasui, Koji Inoue, Takatsugu Ono, Hiroshi Sasaki, Katsuki Fujisawa

IEICE Trans. Inf. Syst., 2018

2017

Dependence Graph Model for Accurate Critical Path Analysis on Out-of-Order Processors.

Teruo Tanimoto, Takatsugu Ono, Koji Inoue

J. Inf. Process., 2017

Enhanced Dependence Graph Model for Critical Path Analysis on Modern Out-of-Order Processors.

Teruo Tanimoto, Takatsugu Ono, Koji Inoue, Hiroshi Sasaki

IEEE Comput. Archit. Lett., 2017

CPCI Stack: Metric for Accurate Bottleneck Analysis on OoO Microprocessors.

Teruo Tanimoto, Takatsugu Ono, Koji Inoue

Proceedings of the Fifth International Symposium on Computing and Networking, 2017

Wireless Spoofing-Attack Prevention Using Radio-Propagation Characteristics.

Mihiro Sonoyama, Takatsugu Ono, Osamu Muta, Haruichi Kanaya, Koji Inoue

Proceedings of the 15th IEEE Intl Conf on Dependable, 2017

2016

Power-Efficient Breadth-First Search with DRAM Row Buffer Locality-Aware Address Mapping.

Satoshi Imamura, Yuichiro Yasui, Koji Inoue, Takatsugu Ono, Hiroshi Sasaki, Katsuki Fujisawa

Proceedings of the 2016 High Performance Graph Data Management and Processing Workshop, 2016

Single-flux-quantum cache memory architecture.

Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue

Proceedings of the International SoC Design Conference, 2016

Evaluating the impacts of code-level performance tunings on power efficiency.

Satoshi Imamura, Keitaro Oka, Yuichiro Yasui, Yuichi Inadomi, Katsuki Fujisawa, Toshio Endo, Koji Ueno, Keiichiro Fukazawa, Nozomi Hata, Yuta Kakibuka, Koji Inoue, Takatsugu Ono

Proceedings of the 2016 IEEE International Conference on Big Data (IEEE BigData 2016), 2016

2015

A Flexible Direct Attached Storage for a Data Intensive Application.

Takatsugu Ono, Yotaro Konishi, Teruo Tanimoto, Noboru Iwamatsu, Takashi Miyoshi, Jun Tanaka

IEICE Trans. Inf. Syst., 2015

2014

Hardware-assisted scalable flow control of shared receive queue.

Teruo Tanimoto, Takatsugu Ono, Kohta Nakashima, Takashi Miyoshi

Proceedings of the 2014 International Conference on Supercomputing, 2014

FlexDAS: A flexible direct attached storage for I/O intensive applications.

Takatsugu Ono, Yotaro Konishi, Teruo Tanimoto, Noboru Iwamatsu, Takashi Miyoshi, Jun Tanaka

Proceedings of the 2014 IEEE International Conference on Big Data (IEEE BigData 2014), 2014

2009

Reducing On-Chip DRAM Energy via Data Transfer Size Optimization.

Takatsugu Ono, Koji Inoue, Kazuaki J. Murakami, Kenji Yoshida

IEICE Trans. Electron., 2009