Satoshi Kawakami

According to our database, Satoshi Kawakami authored at least 15 papers between 2013 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Empirical Power-performance Analysis of Layer-wise CNN Inference on Single Board Computers.

KuanYi Ng, Aalaa M. A. Babai, Teruo Tanimoto, Satoshi Kawakami, Koji Inoue

J. Inf. Process., 2023

Design of The Ultra-Low-Power Driven VMM Configurations for μW Scale IoT Devices.

Keisuke Takano, Takeaki Yajima, Satoshi Kawakami

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

Evaluating floating-point multipliers with opto-electrical hybrid circuits.

Takumi Inaba, Takatsugu Ono, Koji Inoue, Satoshi Kawakami

Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023

2022

An Edge Autonomous Lamp Control with Camera Feedback.

Satoshi Matsushita, Teruo Tanimoto, Satoshi Kawakami, Takatsugu Ono, Koji Inoue

Proceedings of the 8th IEEE World Forum on Internet of Things, 2022

Design and Analysis of a Nano-photonic Processing Unit for Low-Latency Recurrent Neural Network Applications.

Eito Sato, Koji Inoue, Satoshi Kawakami

Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022

A Hybrid Opto-Electrical Floating-point Multiplier.

Takumi Inaba, Takatsugu Ono, Koji Inoue, Satoshi Kawakami

Proceedings of the 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2022

Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device.

Iori Ishikawa, Ikki Nagaoka, Ryota Kashima, Koki Ishida, Kosuke Fukumitsu, Keitaro Oka, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Akira Fujimaki, Koji Inoue

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Superconductor Computing for Neural Networks.

Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue

IEEE Micro, 2021

2020

32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic.

Koki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, Koji Inoue

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices.

Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Practical Error Modeling Toward Realistic NISQ Simulation.

Teruo Tanimoto, Shuhei Matsuo, Satoshi Kawakami, Yutaka Tabuchi, Masao Hirokawa, Koji Inoue

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

How Many Trials Do We Need for Reliable NISQ Computing?

Teruo Tanimoto, Shuhei Matsuo, Satoshi Kawakami, Yutaka Tabuchi, Masao Hirokawa, Koji Inoue

Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Enhancing a manycore-oriented compressed cache for GPGPU.

Keitaro Oka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Koji Inoue

Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2020

2018

Parallel Precomputation with Input Value Prediction for Model Predictive Control Systems.

Satoshi Kawakami, Takatsugu Ono, Toshiyuki Ohtsuka, Koji Inoue

IEICE Trans. Inf. Syst., 2018

2013

Many-core acceleration for model predictive control systems.

Satoshi Kawakami, Akihito Iwanaga, Koji Inoue

Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, 2013