Theodore Antonakopoulos

According to our database1, Theodore Antonakopoulos authored at least 66 papers between 1988 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2020
Accurate Emulation of Memristive Crossbar Arrays for In-Memory Computing.
CoRR, 2020

Mixed-precision deep learning based on computational memory.
CoRR, 2020

Wearable Smart Health Advisors: An IMU-Enabled Posture Monitor.
IEEE Consumer Electron. Mag., 2020

A Real-Time Non-Volatile Memory Analyzer and its Use on the Evaluation of Storage Devices based on NAND Flash Memories.
Proceedings of the 2020 IEEE International Instrumentation and Measurement Technology Conference, 2020

2019
Computational memory-based inference and training of deep neural networks.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Classification using Discriminative Restricted Boltzmann Machines on Spark.
Proceedings of the 2019 International Conference on Software, 2019

2018
Accurate PCM Crosspoint Emulator and its Use on Eigenvalues Calculation.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Real-Time Emulation of Multiple NAND Flash Channels by Exploiting the DRAM Memory of High-end Servers.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

A Versatile PCM-Based Circuits Emulator and Its Use on Implementing Linear Algebra Functions.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2017
Architecture and implementation of a Restricted Boltzmann Machine for handwritten digits recognition.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

Cloud services using hardware accelerators: The case of handwritten digits recognition.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

SPoMo: IMU-based real-time sitting posture monitoring.
Proceedings of the 7th IEEE International Conference on Consumer Electronics - Berlin, 2017

2016
Controller architecture for low-latency access to phase-change memory in OpenPOWER systems.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015
MLC NAND Flash memory: Aging effect and chip/channel emulation.
Microprocess. Microsystems, 2015

2014
Prototyping and performance evaluation of a dynamically adaptable block device driver for PCIe-based SSDs.
Proceedings of the 25nd IEEE International Symposium on Rapid System Prototyping, 2014

Emulating the aging of NAND Flash memories as a time-variant communications channel.
Proceedings of the 6th International Symposium on Communications, 2014

BER analysis of MLC NAND Flash memories based on an asymmetric PAM model.
Proceedings of the 6th International Symposium on Communications, 2014

A bluetooth smart analyzer in iBeacon networks.
Proceedings of the IEEE Fourth International Conference on Consumer Electronics Berlin, 2014

A Versatile Emulator for the Aging Effect of Non-volatile Memories: The Case of NAND Flash.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
Correlated noise estimation and error correction in parallel storage channels.
Proceedings of the IEEE International Symposium on Signal Processing and Information Technology, 2013

Architecture and implementation of an adaptive nanopositioning controller for fast spiral scanning.
Proceedings of the IEEE International Symposium on Signal Processing and Information Technology, 2013

Modeling of readback signal generated by scanning PCM surfaces.
Proceedings of the 18th International Conference on Digital Signal Processing, 2013

A versatile platform for characterization of solid-state memory channels.
Proceedings of the 18th International Conference on Digital Signal Processing, 2013

Variability of NVM response time and its effect on the performance of consumer SSDs.
Proceedings of the IEEE Third International Conference on Consumer Electronics, 2013

2012
Investigating the use of symbol timing recovery for medium-derived feedback in nanopositioning controllers.
Proceedings of the IEEE International Conference on Control Applications, 2012

2010
Using flash memories as SIMO channels for extending the lifetime of solid-state drives.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Control for high-speed archimedean spiral nanopositioning.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
Coding efficiency and reliability in probe-based storage devices.
Proceedings of the 2009 IEEE Information Theory Workshop, 2009

Architecture and DSP Implementation of a DVB-S2 Baseband Demodulator.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
Probe-based ultrahigh-density storage technology.
IBM J. Res. Dev., 2008

Bit and Power Allocation in Constrained Multicarrier Systems: The Single-User Case.
EURASIP J. Adv. Signal Process., 2008

A low-complexity bandwidth allocation algorithm for frequency-selective multiuser OFDM systems.
Comput. Commun., 2008

2007
An IF Digital Down-Converter for Software Radio DVB-S2 Receivers.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

A Bandwidth Allocation Algorithm for Multiuser OFDM Systems and its Efficient Implementation.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

2005
Far-end crosstalk identification method based on channel training sequences.
IEEE Trans. Instrum. Meas., 2005

A new computationally efficient discrete bit-loading algorithm for DMT applications.
IEEE Trans. Commun., 2005

2004
From Protocol Models to Their Implementation: A Versatile Testing Methodology.
IEEE Des. Test Comput., 2004

Transmission Systems Prototyping Based on Stateflow/Simulink Models.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004

2003
On mapping stochastic processes into hardware and its application on ATM traffic emulation.
IEEE Trans. Instrum. Meas., 2003

Intelligent devices for appliances control in home networks.
IEEE Trans. Consumer Electron., 2003

The IEEE 802.11 Distributed Coordination Function in Small-Scale Ad-Hoc Wireless LANs.
Int. J. Wirel. Inf. Networks, 2003

A dynamically adaptable polling scheme for voice support in IEEE802.11 networks.
Comput. Commun., 2003

VIRUS: a pseudo-framing method for cell-based interfaces.
Comput. Commun., 2003

xDSL Systems Prototyping using a Flexible Emulation Environment.
Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003

Cooperative bit-loading and fairness bandwidth allocation in ADSL systems.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Analytical computation of multipath components in the indoor power grid.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Direction finding in IEEE802.11 wireless networks.
IEEE Trans. Instrum. Meas., 2002

CSMA/CA performance under high traffic conditions: throughput and delay analysis.
Comput. Commun., 2002

2001
Equilibrium point analysis of the binary exponential backoff algorithm.
Comput. Commun., 2001

Voice Communications over IEEE 802.11 Wireless LANs Interconnected Using ATM Links.
Proceedings of the 26th Annual IEEE Conference on Local Computer Networks (LCN 2001), 2001

CBR Packetized Voice Transmission in IEEE802.11 Networks.
Proceedings of the Sixth IEEE Symposium on Computers and Communications (ISCC 2001), 2001

Performance Analysis of 100 Mbps PACE Technology Ethernet Networks.
Proceedings of the Sixth IEEE Symposium on Computers and Communications (ISCC 2001), 2001

A New Cut-Through Forwarding Mechanism for ATM Multipoint-to-Point Connections.
Proceedings of the Networking, 2001

Run-Time Optimized Reconfiguration Using Instruction Forecasting.
Proceedings of the Field-Programmable Logic and Applications, 2001

2000
A printed circuit switched array antenna for indoor communications.
IEEE Trans. Consumer Electron., 2000

Letter: Compressed Disparity Information Transmission over Constant Bit Rate ATM Channels.
Eur. Trans. Telecommun., 2000

A Methodology for Implementing Medium Access Protocols Using a General Parameterized Architecture.
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000

Reconfigurable Network Processors Based on Field Programmable System Level Integrated Circuits.
Proceedings of the Field-Programmable Logic and Applications, 2000

1999
A new efficient access protocol for integrating multimedia services in the home environment.
IEEE Trans. Consumer Electron., 1999

1998
Real-Time Disparity Information Compression in 3D Teleconferencing Systems.
Proceedings of the 24th EUROMICRO '98 Conference, 1998

1996
Design and Implementation of a new Synchronization Method for High-Speed Cell-based Network Interfaces.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

1995
CASE tools evaluation: an automatic process based on fuzzy sets theory.
Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP '95), 1995

1994
A real-time test-bed for prototyping cell-based communication networks.
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994

1993
A distributed bandwidth allocation algorithm for Gbit/s LANs.
Microprocess. Microprogramming, 1993

1992
An adaptable frame multiplexing scheme for source routing bridges.
Microprocess. Microprogramming, 1992

1988
Architecture and Implementation of the Access Mechanism for a Bus-Structured Multiservice LAN.
Proceedings of the 8th International Conference on Distributed Computing Systems, 1988


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