S. R. Nandakumar

Orcid: 0000-0002-7930-508X

According to our database1, S. R. Nandakumar authored at least 20 papers between 2015 and 2023.

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Bibliography

2023
Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators.
CoRR, 2023

2022
Precision of bit slicing with in-memory computing based on analog phase-change memory crossbars.
Neuromorph. Comput. Eng., 2022

ML-HW Co-Design of Noise-Robust TinyML Models and Always-On Analog Compute-in-Memory Edge Accelerator.
IEEE Micro, 2022

HERMES-Core - A 1.59-TOPS/mm<sup>2</sup> PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs.
IEEE J. Solid State Circuits, 2022

2021
AnalogNets: ML-HW Co-Design of Noise-robust TinyML Models and Always-On Analog Compute-in-Memory Accelerator.
CoRR, 2021

HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

Accurate Weight Mapping in a Multi-Memristive Synaptic Unit.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021


2020
Mixed-precision deep learning based on computational memory.
CoRR, 2020

Bio-mimetic Synaptic Plasticity and Learning in a sub-500mV Cu/SiO<sub>2</sub>/W Memristor.
CoRR, 2020

2019
Deep learning acceleration based on in-memory computing.
IBM J. Res. Dev., 2019

Supervised Learning in Spiking Neural Networks with Phase-Change Memory Synapses.
CoRR, 2019

Computational memory-based inference and training of deep neural networks.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Phase-Change Memory Models for Deep Learning Training and Inference.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
Impact of conductance drift on multi-PCM synaptic architectures.
Proceedings of the Non-Volatile Memory Technology Symposium, 2018

Mixed-precision architecture based on computational memory for training deep neural networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Mixed-precision training of deep neural networks using computational memory.
CoRR, 2017

Neuromorphic computing with multi-memristive synapses.
CoRR, 2017

An efficient synaptic architecture for artificial neural networks.
Proceedings of the 17th Non-Volatile Memory Technology Symposium, 2017

2015
Live demonstration: Spiking neural circuit based navigation inspired by C. elegans thermotaxis.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015


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