Thomas Fröhnel

According to our database1, Thomas Fröhnel authored at least 3 papers between 2010 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2010
A 32kB 2R/1W L1 data cache in 45nm SOI technology for the POWER7TM processor.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010



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