Sudesh Saroop

According to our database1, Sudesh Saroop authored at least 6 papers between 2010 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2021
Novel mmWave NMOS Device for High Pout mmWave Power Amplifiers in 45RFSOI.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

SiGe HBTs with ${f_{T}/f_{\max}\, \sim\, 375/510GHz}$ Integrated in 45nm PDSOI CMOS.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2021

2016
A Universal Hardware-Driven PVT and Layout-Aware Predictive Failure Analytics for SRAM.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2015
Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2011
The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

2010


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