Tianrui Ma

Orcid: 0000-0003-0894-6653

According to our database1, Tianrui Ma authored at least 21 papers between 2022 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
Systematic Methodology of Modeling and Design Space Exploration for CMOS Image Sensors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2026

SPLATONIC: Architectural Support for 3D Gaussian Splatting SLAM via Sparse Processing.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

Cambricon-CIM: Enabling Energy-Efficient and Error-Resilient Analog CIM Acceleration via Reformation of Coding Bases.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2026

Hardwired-Neuron Language Processing Units as General-Purpose Cognitive Substrates.
Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2026

CommILP: Synthesizing Communication Infrastructure for Domain Computing Platforms.
Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026

2025
Splatonic: Architecture Support for 3D Gaussian Splatting SLAM via Sparse Processing.
CoRR, November, 2025

Hardwired-Neurons Language Processing Units as General-Purpose Cognitive Substrates.
CoRR, August, 2025

QiMeng: Fully Automated Hardware and Software Design for Processor Chip.
CoRR, June, 2025

RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization With Knowledge-Infused Reinforcement Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2025

PrivateEye: In-Sensor Privacy Preservation Through Optical Feature Separation.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2025

HARD: Hardening Real-Time Scheduling and Analysis for Accelerator Enabled Computing.
Proceedings of the 31st IEEE Real-Time and Embedded Technology and Applications Symposium, 2025

LoRASensE: Learnable Low-Rank Acquisition in Sensors for Efficient Edge Machine Vision.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2025

SEAL: A Single-Event Architecture for In-Sensor Visual Localization.
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

DenSparSA: A Balanced Systolic Array Approach for Dense and Sparse Matrix Multiplication.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

SNAPPIX: Efficient-Coding-Inspired In-Sensor Compression for Edge Vision.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024
Cambricon-M: A Fibonacci-Coded Charge-Domain SRAM-Based CIM Accelerator for DNN Inference.
Proceedings of the 57th IEEE/ACM International Symposium on Microarchitecture, 2024

BlissCam: Boosting Eye Tracking Efficiency with Learned In-Sensor Sparse Sampling.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

2023
LeCA: In-Sensor Learned Compressive Acquisition for Efficient Machine Vision on the Edge.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

CAMJ: Enabling System-Level Energy Modeling and Architectural Exploration for In-Sensor Visual Computing.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

Invited Paper: Learned In-Sensor Visual Computing: From Compression to Eventification.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
HOGEye: Neural Approximation of HOG Feature Extraction in RRAM-Based 3D-Stacked Image Sensors.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022


  Loading...