Tobias Stuckenberg

Orcid: 0000-0002-9245-3167

According to our database1, Tobias Stuckenberg authored at least 10 papers between 2018 and 2026.

Collaborative distances:

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
RISC-V Instruction Fetch Architecture Optimized for Harsh Environments.
Int. J. Parallel Program., September, 2026

2023
Design and Evaluation of a 180 nm Powerline Communication ASIC for Harsh Environment.
Microprocess. Microsystems, March, 2023

High Performance Instruction Fetch Structure within a RISC-V Processor for Use in Harsh Environments.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023


2021
Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments.
Int. J. Parallel Program., 2021

Powerline Communication System-on-Chip in 180 nm Harsh Environment SOI Technology.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

2020
DIY Smart Home: The Development of an Exemplary Internet of Things Infrastructure for Computer Science Education.
Proceedings of the 2020 ACM Conference on Innovation and Technology in Computer Science Education, 2020

2019
Design and Optimization of an ARM Cortex-M Based SoC for TCP/IP Communication in High Temperature Applications.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh Environments.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

2018
A Hardware Efficient Preamble Detection Algorithm for Powerline Communication.
J. Commun., 2018


  Loading...