Chirag Sudarshan

According to our database, Chirag Sudarshan authored at least 25 papers between 2018 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Non-idealities and Design Solutions for Analog Memristor-Based Content-Addressable Memories.

Paul-Philipp Manea, Chirag Sudarshan, Felix Cüppers, John Paul Strachan

Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving.

Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Christoph Riggers, Oliver Renke, Till Fiedler, Jakob Marten, Tobias Stuckenberg, Holger Blume, Christian Weis, Lukas Steiner, Chirag Sudarshan, Norbert Wehn, Lennart M. Reimann, Rainer Leupers, Michael Beyer, Daniel Köhler, Alisa Jauch, Jan Micha Borrmann, Setareh Jaberansari, Tim Berthold, Meinolf Blawat, Markus Kock, Gregor Schewior, Jens Benndorf, Frederik Kautz, Hans-Martin Blüthgen, Christian Sauer

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022

A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference.

Chirag Sudarshan, Taha Soliman, Jan Lappas, Christian Weis, Mohammad Hassani Sadi, Matthias Jung, Andre Guntoro, Norbert Wehn

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

FeFET versus DRAM based PIM Architectures: A Comparative Study.

Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions.

Chirag Sudarshan, Mohammad Hassani Sadi, Lukas Steiner, Christian Weis, Norbert Wehn

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022

A Framework for Formal Verification of DRAM Controllers.

Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn

Proceedings of the 2022 International Symposium on Memory Systems, 2022

Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training.

Chirag Sudarshan, Mohammad Hassani Sadi, Christian Weis, Norbert Wehn

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks.

Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng

J. Signal Process. Syst., 2021

A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation.

Chirag Sudarshan, Lukas Steiner, Matthias Jung, Jan Lappas, Christian Weis, Norbert Wehn

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs.

Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex.

Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn

J. Signal Process. Syst., 2020

Efficient Hardware Architectures for 1D- and MD-LSTM Networks.

Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng

J. Signal Process. Syst., 2020

Efficient Generation of Application Specific Memory Controllers.

Marco V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer, Johannes Feldmann, Chirag Sudarshan, Christian Weis, Sven Oliver Krumke, Norbert Wehn

Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory.

Sven Müelich, Chirag Sudarshan, Christian Weis, Martin Bossert, Robert F. H. Fischer, Norbert Wehn

Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions.

Muhammad Mohsin Ghaffar, Chirag Sudarshan, Christian Weis, Matthias Jung, Norbert Wehn

Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

2019

eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex.

Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn

CoRR, 2019

A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing.

Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements.

Sven Müelich, Sebastian Bitzer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Martin Bossert, Robert F. H. Fischer

Proceedings of the XVI International Symposium "Problems of Redundancy in Information and Control Systems", 2019

Fast validation of DRAM protocols with timed petri nets.

Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn

Proceedings of the International Symposium on Memory Systems, 2019

An In-DRAM Neural Network Processing Engine.

Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

Efficient coding scheme for DDR4 memory subsystems.

Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos

Proceedings of the International Symposium on Memory Systems, 2018

Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving.

Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn

Proceedings of the International Symposium on Memory Systems, 2018

The Role of Memories in Transprecision Computing.

Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An analysis on retention error behavior and power consumption of recent DDR4 DRAMs.

Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Improving the error behavior of DRAM by exploiting its Z-channel property.

Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018