Sven Gesper

According to our database, Sven Gesper authored at least 7 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

PATARA: Extension of a Verification Framework for RISC-V Instruction Set Implementations.

Sven Gesper, Fabian Stuckmann, Lucy Wöbbekind, Guillermo Payá Vayá

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

N²V²PRO: Neural Network Mapping Framework for a Custom Vector Processor Architecture.

Sven Gesper, Gia Bao Thieu, Daniel Köhler, Markus Kock, Tim Berthold, Oliver Renke, Holger Blume, Guillermo Payá Vayá

Proceedings of the 13th IEEE International Conference on Consumer Electronics - Berlin, 2023

ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving.

Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Christoph Riggers, Oliver Renke, Till Fiedler, Jakob Marten, Tobias Stuckenberg, Holger Blume, Christian Weis, Lukas Steiner, Chirag Sudarshan, Norbert Wehn, Lennart M. Reimann, Rainer Leupers, Michael Beyer, Daniel Köhler, Alisa Jauch, Jan Micha Borrmann, Setareh Jaberansari, Tim Berthold, Meinolf Blawat, Markus Kock, Gregor Schewior, Jens Benndorf, Frederik Kautz, Hans-Martin Blüthgen, Christian Sauer

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Exploiting Subword Permutations to Maximize CNN Compute Performance and Efficiency.

Michael Beyer, Sven Gesper, Andre Guntoro, Guillermo Payá Vayá, Holger Blume

Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs.

Johannes Knödtel, Hector Gerardo Muñoz Hernandez, Alexander Lehnert, Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Marc Reichenbach

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

2021

Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments.

Sven Gesper, Moritz Weißbrich, Tobias Stuckenberg, Pekka Jääskeläinen, Holger Blume, Guillermo Payá Vayá

Int. J. Parallel Program., 2021

2019

Evaluation of Different Processor Architecture Organizations for On-site Electronics in Harsh Environments.

Sven Gesper, Moritz Weißbrich, Stephan Nolting, Tobias Stuckenberg, Pekka Jääskeläinen, Holger Blume, Guillermo Payá Vayá

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019