Vassili Kireev

According to our database, Vassili Kireev authored at least 5 papers between 2013 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET.

Yohan Frans, Jaewook Shin, Lei Zhou, Parag Upadhyaya, Jay Im, Vassili Kireev, Mohamed Elzeftawi, Hiva Hedayati, Toan Pham, Santiago Asuncion, Chris Borrelli, Geoff Zhang, Hongtao Zhang, Ken Chang

IEEE J. Solid State Circuits, 2017

2016

A 56Gb/s PAM4 wireline transceiver using a 32-way time-interleaved SAR ADC in 16nm FinFET.

Yohan Frans, Mohamed Elzeftawi, Hiva Hedayati, Jay Im, Vassili Kireev, Toan Pham, Jaewook Shin, Parag Upadhyaya, Lei Zhou, Santiago Asuncion, Chris Borrelli, Geoff Zhang, Hongtao Zhang, Ken Chang

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

FinFET MPSoC 32 Gb/s transceivers: Custom ESD protection and verification.

James Karp, Michael J. Hart, Mohammed Fakhruddin, Vassili Kireev, Larry Horwitz, Matthew Hogan

Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

2015

A 8-14 GHz varactorless current controlled LC oscillator in 16nm CMOS technology.

Somnath Kundu, Vassili Kireev, Chris H. Kim

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2013

A Low-Power 0.5-6.6 Gb/s Wireline Transceiver Embedded in Low-Cost 28 nm FPGAs.

Jafar Savoj, Kenny C.-H. Hsieh, Fu-Tai An, J. Gong, Jay Im, Xuewen Jiang, Anup P. Jose, Vassili Kireev, Siok-Wei Lim, Arianne Roldan, D. Z. Turker, Parag Upadhyaya, Zhaoyin Daniel Wu, Ken Chang

IEEE J. Solid State Circuits, 2013