Hiva Hedayati

According to our database1, Hiva Hedayati authored at least 10 papers between 2009 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2018
Clock Synchronous Reset and Skew Calibration of 65GS/s ADCs in A Multi-Lane Coherent Receiver.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2017
A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET.
IEEE J. Solid State Circuits, 2017

2016
A 40-to-64 Gb/s NRZ Transmitter With Supply-Regulated Front-End in 16 nm FinFET.
IEEE J. Solid State Circuits, 2016

A 56Gb/s PAM4 wireline transceiver using a 32-way time-interleaved SAR ADC in 16nm FinFET.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

3.7 A 40-to-64Gb/s NRZ transmitter with supply-regulated front-end in 16nm FinFET.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2012
A 3 GHz Wideband Σ Δ Fractional-N Synthesizer With Switched-RC Sample-and-Hold PFD.
IEEE Trans. Very Large Scale Integr. Syst., 2012

2010
Correction to "A 1 MHz Bandwidth, 6 GHz 0.18 μ m CMOS Type-I Delta Sigma Fractional-N Synthesizer for WiMAX Applications" [Dec 09 3244-3252].
IEEE J. Solid State Circuits, 2010

2009
A 1 MHz Bandwidth, 6 GHz 0.18 µm CMOS Type-I ΔΣ Fractional-NSynthesizer for WiMAX Applications.
IEEE J. Solid State Circuits, 2009

A 1MHz-bandwidth type-I ΔΣ fractional-N synthesizer for WiMAX applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009


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