Wenbin Jia

According to our database, Wenbin Jia authored at least 9 papers between 2023 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

An Area-Efficient Lookup-Table -Based eDRAM Digital CIM Macro for Neural Network Inference.

Yifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu

IEEE J. Solid State Circuits, April, 2026

Hy2S-CIM: Hybrid-Cache-LUT FP/INT-CIM with 2-Stage Alignment and Area-efficient LUT for High Precision Vision AI Tasks.

Xiang Li, Wenbin Jia, Sheng Zhang, Yongpan Liu

Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026

2025

A Multiply-Less Approximate SRAM Compute-In-Memory Macro for Neural-Network Inference.

Haikang Diao, Yifan He, Xuan Li, Chen Tang, Wenbin Jia, Jinshan Yue, Haoyang Luo, Jiahao Song, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu, Yuan Wang, Xiyuan Tang

IEEE J. Solid State Circuits, February, 2025

A 28nm 3.14 TFLOP/W BF16 LLM Fine-Tuning Processor with Asymmetric Quantization Computing for AI PC.

Xinyuan Lin, Leran Huang, Chenhan Wei, Wenbin Jia, Hedi Wang, Wenxun Wang, Hongyang Jia, Huazhong Yang, Yongpan Liu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

Pro-Cache-CIM: A 28nm 69.4TOPS/W Product-Cache-based Digital-Compute-in-Memory Macro Leveraging Data Locality Pattern in Vision AI Tasks.

Wenbin Jia, Yifan He, Xiang Li, Yixuan Xie, Zongle Huang, Wenxun Wang, Boju Chen, Yaolei Li, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024

A Heterogeneous Microprocessor for Intermittent AI Inference Using Nonvolatile-SRAM-Based Compute-In-Memory.

Tongda Wu, Luchang Lei, Yifan He, Wenbin Jia, Songming Yu, Yuxuan Huang, Hongyang Jia, Huazhong Yang, Yongpan Liu

IEEE Trans. Circuits Syst. II Express Briefs, November, 2024

34.7 A 28nm 2.4Mb/mm² 6.9 - 16.3TOPS/mm² eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and Refreshing.

Yifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023

A Weight-Reload-Eliminated Compute-in-Memory Accelerator for 60 fps 4K Super-Resolution.

Yaolei Li, Jinshan Yue, Jingyu Wang, Chen Tang, Yifan He, Wenbin Jia, Kaiwei Zou, Lu Zhang, Huazhong Yang, Yongpan Liu

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

A 28nm 38-to-102-TOPS/W 8b Multiply-Less Approximate Digital SRAM Compute-In-Memory Macro for Neural-Network Inference.

Yifan He, Haikang Diao, Chen Tang, Wenbin Jia, Xiyuan Tang, Yuan Wang, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu

Proceedings of the IEEE International Solid- State Circuits Conference, 2023