Waleed Khalil

Orcid: 0000-0002-1613-675X

According to our database1, Waleed Khalil authored at least 48 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
A 2.4 GHz low-power and compact 3-bit active phase shifter utilizing miller capacitance.
Microelectron. J., October, 2023

Design Space Exploration of TRNG Latches for Improved Entropy and Efficiency.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Lightning Talk: Unlocking the Potential of the Analog Domain: Exploring the Next Frontier in Hardware Security.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
An Open-Circuit Voltage Pixel for Low-Light Visible Imaging in a Standard CMOS Process.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

2021
Signal and Noise Analysis of an Open-Circuit Voltage Pixel for Uncooled Infrared Image Sensors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Analog-Inspired Hardware Security: A Low-Energy Solution for IoT Trusted Communications.
Proceedings of the 34th IEEE International System-on-Chip Conference, 2021

2020
Defense-in-depth: A recipe for logic locking to prevail.
Integr., 2020

Advancing Uncooled Infrared Imagers Using An Open-Circuit Voltage Pixel.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

2019
Wide-Bandwidth, High-Linearity, 2.8-GS/s, 10-bit Accurate Sample and Hold Amplifier in 130-nm SiGe BiCMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Analysis of SRAM Enhancements Through Sense Amplifier Capacitive Offset Correction and Replica Self-Timing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Process Specific Functions for Assurance of Analog/Mixed-Signal Integrated Circuits.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

2018
A Capacitively Coupled, Pseudo Return-to-Zero Input, Latched-Bias Data Receiver.
IEEE J. Solid State Circuits, 2018

A Wide Tuning Range Millimeter Wave CMOS LCVCO with Linearized Coarse Tuning Characteristics.
Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

Sense amplifier offset cancellation and replica timing calibration for high-speed SRAMs.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

An on-chip resonant-gate-drive switched-capacitor converter for near-threshold computing achieving 70.2% efficiency at 0.92A/mm<sup>2</sup> current density and 0.4V output.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A High Linearity, 2.8 GS/s, 10-bit Accurate, Sample and Hold Amplifier in 130 nm SiGe BiCMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Self-Biased Differential Rectifier With Enhanced Dynamic Range for Wireless Powering.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR.
IEEE J. Solid State Circuits, 2017

16.6 A 10b DC-to-20GHz multiple-return-to-zero DAC with >48dB SFDR.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A calibration-free low-power supply-pushing reduction circuit (SPRC) for LC VCOs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
A Time-Interleaved Multimode ΔΣ RF-DAC for Direct Digital-to-RF Synthesis.
IEEE J. Solid State Circuits, 2016

Impact of technology scaling on the tuning range and phase noise of mm-wave CMOS LC-VCOs.
Integr., 2016

2015
Introduction to the Special Section on the 2014 Compound Semiconductor Integrated Circuit Symposium.
IEEE J. Solid State Circuits, 2015

Code Optimization for a Code-Modulated RF Front End.
IEEE Access, 2015

Phase Error Evaluation in a Two-Path Receiver Front-End With On-Site Coding.
IEEE Access, 2015

A fully-integrated switched capacitor voltage regulator for near-threshold applications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Analytical and Experimental Study of Wide Tuning Range mm-Wave CMOS LC-VCOs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Introduction to the Special Section on the IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.
IEEE J. Solid State Circuits, 2014

Tracking energy efficiency of near-threshold design using process variation control techniques.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

On the design of RF-DACs for random acquisition based reconfigurable receivers.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Frequency Tuning Range Extension in LC-VCOs Using Negative-Capacitance Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Accuracy and speed limitations in DACs across CMOS process technologies.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A new broadcast format and receiver architecture for radio controlled clocks.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 10mW 37.8GHz current-redistribution BiCMOS VCO with an average FOMT of -193.5dBc/Hz.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Analytical and experimental study of tuning range limitation in mm-wave CMOS LC-VCOs.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
Architectural trends in GHz speed DACs.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

2011
VCO-Based Quantizers Using Frequency-to-Digital and Time-to-Digital Converters
Springer Briefs in Electrical and Computer Engineering, Springer, ISBN: 978-1-4419-9722-7, 2011

Systematic Analysis of Interleaved Digital-to-Analog Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

2010
Correction to "A 1 MHz Bandwidth, 6 GHz 0.18 μ m CMOS Type-I Delta Sigma Fractional-N Synthesizer for WiMAX Applications" [Dec 09 3244-3252].
IEEE J. Solid State Circuits, 2010

A resistor-free temperature-compensated CMOS current reference.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A compact model for MM-wave transmission lines and interconnects on lossy CMOS substrates.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Sub-THz high gain wide-band low noise amplifiers in 90nm RF CMOS technology.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009
A 1 MHz Bandwidth, 6 GHz 0.18 µm CMOS Type-I ΔΣ Fractional-NSynthesizer for WiMAX Applications.
IEEE J. Solid State Circuits, 2009

A 1MHz-bandwidth type-I ΔΣ fractional-N synthesizer for WiMAX applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007
A Self-Calibrated On-Chip Phase-Noise Measurement Circuit With -75 dBc Single-Tone Sensitivity at 100 kHz Offset.
IEEE J. Solid State Circuits, 2007

A Self-Calibrated On-chip Phase-Noise-Measurement Circuit with -75dBc Single-Tone Sensitivity at 100kHz Offset.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2003
A highly integrated analog front-end for 3G.
IEEE J. Solid State Circuits, 2003

Fully integrated AFE for WCDMA.
Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003


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