Bruce Xu

According to our database1, Bruce Xu authored at least 8 papers between 2012 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Classifying Approximation Algorithms: Understanding the APX Complexity Class.
CoRR, 2021

2019
A Fully Adaptive 19-58-Gb/s PAM-4 and 9.5-29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET.
IEEE J. Solid State Circuits, 2019

A 2.25pJ/bit Multi-lane Transceiver for Short Reach Intra-package and Inter-package Communication in 16nm FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
A fully adaptive 19-to-56Gb/s PAM-4 wireline transceiver with a configurable ADC in 16nm FinFET.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
A 0.5-16.3 Gbps Multi-Standard Serial Transceiver With 219 mW/Channel in 16-nm FinFET.
IEEE J. Solid State Circuits, 2017

2016
A 0.5-16.3Gbps multi-standard serial transceiver with 219mW/channel in 16nm FinFET.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2012
A wide common-mode fully-adaptive multi-standard 12.5Gb/s backplane transceiver in 28nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2012


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