Yangsyu Lin

According to our database, Yangsyu Lin authored at least 4 papers between 2020 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

A 38.1Mb/mm² SRAM in a 2nm-CMOS-Nanosheet Technology for High-Density and Energy-Efficient Compute.

Tsung-Yung Jonathan Chang, Yen-Huei Chen, K. Venkateswara Reddy, Nikhil Puri, Teja Masina, Kuo-Cheng Lin, Po-Sheng Wang, Yangsyu Lin, Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Ku-Feng Lin, Ming-Hung Chang, Ching-Wei Wu, Robin Lee, Yih Wang, Hung-Jen Liao, Quincy Li, Ping-Wei Wang, Geoffrey Yeap

Proceedings of the IEEE International Solid-State Circuits Conference, 2025

2023

A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications.

Jonathan Chang, Yen-Huei Chen, Gary Chan, Kuo-Cheng Lin, Po-Sheng Wang, Yangsyu Lin, Sevic Chen, Peijiun Lin, Ching-Wei Wu, Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Atul Katoch, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2021

A 5-nm 135-Mb SRAM in EUV and High-Mobility Channel FinFET Technology With Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-V_MIN Applications.

Tsung-Yung Jonathan Chang, Yen-Huei Chen, Wei-Min Chan, Hank Cheng, Po-Sheng Wang, Yangsyu Lin, Hidehiro Fujiwara, Robin Lee, Hung-Jen Liao, Ping-Wei Wang, Geoffrey Yeap, Quincy Li

IEEE J. Solid State Circuits, 2021

2020

15.1 A 5nm 135Mb SRAM in EUV and High-Mobility-Channel FinFET Technology with Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-VMIN Applications.

Jonathan Chang, Yen-Huei Chen, Gary Chan, Hank Cheng, Po-Sheng Wang, Yangsyu Lin, Hidehiro Fujiwara, Robin Lee, Hung-Jen Liao, Ping-Wei Wang, Geoffrey Yeap, Quincy Li

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020