According to our database1, Shien-Yang Wu authored at least 4 papers between 2005 and 2017.
IEEE Fellow 2018, "For leadership in CMOS process integration".
Legend:Book In proceedings Article PhD thesis Other
12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications.
J. Solid-State Circuits, 2015
17.2 A 64kb 16nm asynchronous disturb current free 2-port SRAM with PMOS pass-gates for FinFET technologies.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Technology entrepreneurial styles: a comparison of UMC and TSMC.